參數(shù)資料
型號(hào)： DC575A
廠商： Linear Technology
文件頁數(shù)： 39/48頁
文件大小： 0K
描述： BOARD DELTA SIGMA ADC LTC2410
軟件下載： QuikEval System
設(shè)計(jì)資源： DC575A Design File
DC575A Schematic
標(biāo)準(zhǔn)包裝： 1
系列： QuikEval™
ADC 的數(shù)量： 2
位數(shù)： 24
采樣率（每秒）： 7.5
數(shù)據(jù)接口： MICROWIRE?，串行，SPI?
工作溫度： 0°C ~ 70°C
已用 IC / 零件： LTC2410
已供物品： 板
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LTC2410
44
TYPICAL APPLICATIO S
U
*****************************************************
* This example program transfers the LTC2410's 32-bit output
*
* conversion result into four consecutive 8-bit memory locations. *
*****************************************************
*68HC11 register definition
PORTD
EQU
$1008
Port D data register
*
" – , – , SS* ,CSK ;MOSI,MISO,TxD ,RxD"
DDRD
EQU
$1009
Port D data direction register
SPSR
EQU
$1028
SPI control register
*
"SPIE,SPE ,DWOM,MSTR;SPOL,CPHA,SPR1,SPR0"
SPSR
EQU
$1029
SPI status register
*
"SPIF,WCOL, – ,MODF; – , – , – , – "
SPDR
EQU
$102A
SPI data register; Read-Buffer; Write-Shifter
*
* RAM variables to hold the LTC2410's 32 conversion result
*
DIN1
EQU
$00
This memory location holds the LTC2410's bits 31 - 24
DIN2
EQU
$01
This memory location holds the LTC2410's bits 23 - 16
DIN3
EQU
$02
This memory location holds the LTC2410's bits 15 - 08
DIN4
EQU
$03
This memory location holds the LTC2410's bits 07 - 00
*
**********************
* Start GETDATA Routine *
**********************
*
ORG
$C000
Program start location
INIT1
LDS
#$CFFF
Top of C page RAM, beginning location of stack
LDAA
#$2F
–,–,1,0;1,1,1,1
*
–, –, SS*-Hi, SCK-Lo, MOSI-Hi, MISO-Hi, X, X
STAA
PORTD
Keeps SS* a logic high when DDRD, bit 5 is set
LDAA
#$38
–,–,1,1;1,0,0,0
STAA
DDRD
SS*, SCK, MOSI are configured as Outputs
*
MISO, TxD, RxD are configured as Inputs
*DDRD's bit 5 is a 1 so that port D's SS* pin is a general output
LDAA
#$50
STAA
SPCR
The SPI is configured as Master, CPHA = 0, CPOL = 0
*
and the clock rate is E/2
*
(This assumes an E-Clock frequency of 4MHz. For higher E-
*
Clock frequencies, change the above value of $50 to a value
*
that ensures the SCK frequency is 2MHz or less.)
GETDATA PSHX
PSHY
PSHA
LDX
#$0
The X register is used as a pointer to the memory locations
*
that hold the conversion data
LDY
#$1000
BCLR
PORTD, Y %00100000
This sets the SS* output bit to a logic
*
low, selecting the LTC2410
*
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