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參數(shù)資料
| 型號： | DC951A |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 16/40頁 |
| 文件大小： | 0K |
| 描述： | BOARD DELTA SIGMA ADC LTC2481 |
| 軟件下載： | QuikEval System |
| 設(shè)計資源： | DC951A Design File DC951A Schematic |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | Easy Drive™, QuikEval™ |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 7.5 |
| 數(shù)據(jù)接口： | I²C，串行，SPI? |
| 工作溫度： | 0°C ~ 70°C |
| 已用 IC / 零件： | LTC2481 |
| 已供物品： | 板 |
| 相關(guān)產(chǎn)品： | LTC2481HDD#TRPBF-ND - IC ADC DELTA SIGMA 16BIT 10DFN LTC2481HDD#PBF-ND - IC ADC 16BIT I2C 7.5SPS 10DFN LTC2481CDD#TRPBF-ND - IC ADC 16BIT I2C 10-DFN LTC2481IDD#TRPBF-ND - IC ADC 16BIT I2C 10-DFN LTC2481IDD#PBF-ND - IC ADC 16BIT I2C 10-DFN LTC2481CDD#PBF-ND - IC ADC 16BIT I2C 10-DFN |
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LTC2481
23
2481fc
APPLICATIONS INFORMATION
Automatic Differential Input Current Cancellation
In applications where the sensor output impedance is
low (up to 10kΩ with no external bypass capacitor or up
to 500Ω with 0.001μF bypass), complete settling of the
input occurs. In this case, no errors are introduced and
direct digitization of the sensor is possible.
For many applications, the sensor output impedance
combined with external bypass capacitors produces RC
time constants much greater than the 580ns required for
1ppm accuracy. For example, a 10kΩ bridge driving a 0.1μF
bypass capacitor has a time constant several orders of
magnitude greater than the required maximum. Historically,
settling issues were solved using buffers. These buffers led
to increased noise, reduced DC performance (Offset/Drift),
limited input/output swing (cannot digitize signals near
ground or VCC), added system cost and increased power.
The LTC2481 uses a proprietary switching algorithm that
forces the average differential input current to zero inde-
pendent of external settling errors. This allows accurate
direct digitization of high impedance sensors without the
need of buffers (see Figures 13 to 15). Additional errors
resulting from mismatched leakage currents must also
be taken into account.
The switching algorithm forces the average input current
on the positive input (IIN+) to be equal to the average input
current on the negative input (IIN–). Over the complete
conversion cycle, the average differential input current
(IIN+ – IIN–) is zero. While the differential input current
is zero, the common mode input current (IIN++ IIN–)/2 is
proportional to the difference between the common mode
input voltage (VINCM) and the common mode reference
voltage (VREFCM).
In applications where the input common mode voltage
is equal to the reference common mode voltage, as in
the case of a balance bridge type application, both the
differential and common mode input current are zero.
The accuracy of the converter is unaffected by settling
errors. Mismatches in source impedances between IN+
and IN– also do not affect the accuracy.
In applications where the input common mode voltage is
constant but different from the reference common mode
voltage, the differential input current remains zero while
Figure 13. An RC Network at IN+ and IN–
Figure 14. +FS Error vs RSOURCE at IN+ and IN–
Figure 15. –FS Error vs RSOURCE at IN+ and IN–
CEXT
2481 F13
VINCM + 0.5VIN
RSOURCE
IN+
LTC2481
CPAR
20pF
CEXT
VINCM – 0.5VIN
RSOURCE
IN–
CPAR
20pF
RSOURCE (Ω)
1
+FS
ERROR
(ppm)
–20
0
20
1k
100k
2481 F14
–40
–60
–80
10
100
10k
40
60
80
VCC = 5V
VREF = 5V
VIN
+ = 3.75V
VIN
– = 1.25V
TA = 25°C
CEXT = 0pF
CEXT = 100pF
CEXT = 1nF, 0.1μF, 1μF
RSOURCE (Ω)
1
–FS
ERROR
(ppm)
–20
0
20
1k
100k
2481 F15
–40
–60
–80
10
100
10k
40
60
80
VCC = 5V
VREF = 5V
VIN
+ = 1.25V
VIN
– = 3.75V
TA = 25°C
CEXT = 0pF
CEXT = 100pF
CEXT = 1nF, 0.1μF, 1μF
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