LTC2481
15
2481fc
APPLICATIONS INFORMATION
Table 2a. The LTC2481 Performance vs GAIN in Normal Speed Mode (VCC = 5V, VREF = 5V)
GAIN
1
4
8
16
32
64
128
256
UNIT
Input Span
±2.5
±0.625
±0.312
±0.156
±78m
±39m
±19.5m
±9.76m
V
LSB
38.1
9.54
4.77
2.38
1.19
0.596
0.298
0.149
μV
Noise Free Resolution*
65536
32768
16384
Counts
Gain Error
5
8
ppm of FS
Offset Error
0.5
μV
Table 2b. The LTC2481 Performance vs GAIN in 2x Speed Mode (VCC = 5V, VREF = 5V)
GAIN
1
2
4
8
16
32
64
128
UNIT
Input Span
±2.5
±1.25
±0.625
±0.312
±0.156
±78m
±39m
±19.5m
V
LSB
38.1
19.1
9.54
4.77
2.38
1.19
0.596
0.298
μV
Noise Free Resolution*
65536
45875
22937
Counts
Gain Error
5
ppm of FS
Offset Error
200
μV
*The resolution in counts is calculated as the FS divided by LSB or the RMS noise value, whichever is larger.
GAIN (GS2, GS1, GS0)
The input referred gain of the LTC2481 is adjustable from
1 to 256. With a gain of 1, the differential input range is
±VREF/2 and the common mode input range is rail-to-rail.
As the GAIN is increased, the differential input range is re-
duced to ±VREF/2GAINbutthecommonmodeinputrange
remains rail-to-rail. As the differential gain is increased,
low level voltages are digitized with greater resolution. At
a gain of 256, the LTC2481 digitizes an input signal range
of ±9.76mV with over 16,000 counts.
Temperature Sensor (IM)
The LTC2481 includes an on-chip temperature sensor.
The temperature sensor is selected by setting IM = 1 in
the serial input data stream. Conversions are performed
directly on the temperature sensor by the converter. While
operating in this mode, the device behaves as a temperature
to bits converter. The digital reading is proportional to
the absolute temperature of the device. This feature
allows the converter to linearize temperature sensors or
continuously remove temperature effects from external
sensors. Several applications leveraging this feature are
presented in more detail in the applications section. While
operating in this mode, the gain is set to 1 and the speed
is set to normal independent of the control bits (GS2,
GS1, GS0 and SPD).
Rejection Mode (FA, FB)
The LTC2481 includes a high accuracy on-chip oscilla-
tor with no required external components. Coupled with
a 4th order digital lowpass lter, the LTC2481 rejects
line frequency noise. In the default mode, the LTC2481
simultaneously rejects 50Hz and 60Hz by at least 87dB.
The LTC2481 can also be congured to selectively reject
50Hz or 60Hz to better than 110dB.
Speed Mode (SPD)
The LTC2481 continuously performs offset calibrations.
Every conversion cycle, two conversions are automatically
performed (default) and the results combined. This result
is free from offset and drift. In applications where the offset
is not critical, the autocalibration feature can be disabled
with the benet of twice the output rate.
Linearity, full-scale accuracy and full-scale drift are identi-
cal for both 2x and 1x speed modes. In both the 1x and
2x speed there is no latency. This enables input steps or
multiplexer channel changes to settle in a single conver-
sion cycle easing system overhead and increasing the
effective conversion rate.