參數(shù)資料
型號(hào): DLP-HS-FPGA3
廠商: DLP Design Inc
文件頁(yè)數(shù): 16/18頁(yè)
文件大?。?/td> 0K
描述: MODULE USB-TO-FPGA SPARTAN 3A
標(biāo)準(zhǔn)包裝: 1
系列: FPGA
模塊/板類型: FPGA 模塊
適用于相關(guān)產(chǎn)品: USB
其它名稱: 813-1036
Rev. 1.1 (April 2012)
7
DLP Design, Inc.
9.0 TEST BIT FILE
A test file is provided as a download from the DLP Design website that provides rudimentary access
to the I/O features of the DLP-HS-FPGA3. The following features are provided:
Ping
Read the High/Low State of the Input-Only Pins
Drive I/O Pins High/Low or Read their High/Low State
Simple Loopback on Channel A
4-Byte Read/Write Access of the Row, Column, and Bank Address in the DDR2 SDRAM
This bit file is available from the DLP-HS-FPGA3 download page. The command structure that
supports these features is explained in Section 11.
10.0 USB DRIVERS
USB drivers for the following operating systems are available for download from the DLP Design
website at www.dlpdesign.com:
OPERATING SYSTEM SUPPORT
Windows 7 32-bit
Windows 7 64-bit
Windows Vista, Vista x64
Mac OSX
Windows XP, XP x64
Mac OS9
Windows Server 2008, x64
Mac OS8
Windows Server 2003, x64
Linux
Windows 2000
Windows CE 4.2 – 6.0
Notes:
1. The bit file load utility only runs on the Windows platforms.
2. The bit file load utility requires the use of USB channel B, and channel B is dedicated to this
function.
3. If you are utilizing the dual-mode drivers from FTDI (CDM2.x.x) and you want to use the Virtual
COM Port (VCP) drivers, then it may be necessary to disable the D2XX drivers first via Device
Manager. To do so, right click on the entry under USB Controllers that appears when the
DLP-HS-FPGA3 is connected, select Properties, select the Advanced tab, check the option for
“Load VCP” and click OK. Then unplug and replug the DLP-HS-FPGA3, and a COM port should
appear in Device Manager under Ports (COM & LPT).
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