參數(shù)資料
型號： DLP-HS-FPGA3
廠商： DLP Design Inc
文件頁數(shù)： 3/18頁
文件大?。?/td> 0K
描述： MODULE USB-TO-FPGA SPARTAN 3A
標準包裝： 1
系列： FPGA
模塊/板類型： FPGA 模塊
適用于相關(guān)產(chǎn)品： USB
其它名稱： 813-1036
Rev. 1.1 (April 2012)
11
DLP Design, Inc.
The USER I/O Pin Read/Set/Clear Commands I/O number mapping to the physical I/O pins on the
DLP-HS-FPGA3 board are described in the following table:
TABLE 2
User I/O
I/O Number
DLP-HS-
FPGA3
Pin
XC3S1400A
Pin
XC3S1400A
Bank
FPGA Pin Configurations Available
0x00 (0)
J1 Pin 2
D13
0
Digital Input, Output, Differential Pair 0+
0x01 (1)
J1 Pin 3
C13
0
Digital Input, Output, Differential Pair 0-
0x02 (2)
J1 Pin 4
D12
0
Digital Input, Output, Differential Pair 1-
0x03 (3)
J1 Pin 5
C12
0
Digital Input, Output, Differential Pair 1+
0x04 (4)
J1 Pin 6
C10
0
Digital Input, Output, Differential Pair 2+,
Global Clock
0x05 (5)
J1 Pin 7
D9
0
Digital Input, Output, Differential Pair 2-,
Global Clock
0x06 (6)
J1 Pin 8
C8
0
Digital Input, Output, Differential Pair 3+,
Global Clock
0x07 (7)
J1 Pin 9
D8
0
Digital Input, Output, Differential Pair 3-,
Global Clock
0x08 (8)
J1 Pin 10
A14
0
Digital Input, Output, Differential Pair 4+
0x09 (9)
J1 Pin 12
A13
0
Digital Input, Output, Differential Pair 4-
0x0A (10)
J1 Pin 13
A6
0
Digital Input, Output, Differential Pair 5+
0x0B (11)
J1 Pin 14
B6
0
Digital Input, Output, Differential Pair 5-
0x0C (12)
J1 Pin 15
C11
0
Digital Input, Output, Differential Pair 6+
0x0D (13)
J1 Pin 16
A11
0
Digital Input, Output, Differential Pair 6-
0x0E (14)
J1 Pin 17
B8
0
Digital Input, Output, Differential Pair 7-,
Global Clock
0x0F (15)
J1 Pin 18
A8
0
Digital Input, Output, Differential Pair 7+,
Global Clock
0x10 (16)
J1 Pin 19
C5
0
Digital Input, Output, Differential Pair 8-
0x11 (17)
J1 Pin 20
A5
0
Digital Input, Output, Differential Pair 8+
0x12 (18)
J1 Pin 21
B3
0
Digital Input, Output, Differential Pair 9-
0x13 (19)
J1 Pin 22
A3
0
Digital Input, Output, Differential Pair 9+
0x14 (20)
J1 Pin 27
F3
3
Digital Input, Output
0x15 (21)
J1 Pin 29
G2
3
Digital Input, Output
0x16 (22)
J1 Pin 30
C2
3
Digital Input, Output, Differential Pair 11+
0x17 (23)
J1 Pin 31
C1
3
Digital Input, Output, Differential Pair 11-
0x18 (24)
J1 Pin 32
E1
3
Digital Input, Output, Differential Pair 12-
0x19 (25)
J1 Pin 33
D1
3
Digital Input, Output, Differential Pair 12+
0x1A (26)
J1 Pin 34
F4
3
Digital Input, Output
0x1B (27)
J1 Pin 35
J2
3
Digital Input, Output
0x1C (28)
J1 Pin 36
C6
0
Digital Input, Output
0x1D (29)
J1 Pin 37
G3
3
Digital Input, Output
0x1E (30)
J1 Pin 38
M4
3
Digital Input, Output, Differential Pair 15-
0x1F (31)
J1 Pin 39
N3
3
Digital Input, Output, Differential Pair 15+
0x20 (32)
J1 Pin 41
E3
3
Digital Input, Output, Differential Pair 16+
0x21 (33)
J1 Pin 42
E2
3
Digital Input, Output, Differential Pair 16-
0x22 (34)
J1 Pin 43
H3
3
Digital Input, Output, Differential Pair 17+
0x23 (35)
J1 Pin 44
J3
3
Digital Input, Output, Differential Pair 17-
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DLP-HS-FPGA-A 功能描述:FPGA Embedded Module Spartan-3A, XC3S200A FT2232H 66MHz 32MB 制造商:dlp design inc. 系列:FPGA 零件狀態(tài):有效 模塊/板類型:FPGA，USB ?? 核心處理器:Spartan-3A，XC3S200A 協(xié)處理器:FT2232H 速度:66MHz 閃存大小:- RAM 容量:32Mb 連接器類型:USB - B，引腳接頭 大小/尺寸:3" x 1.2"（76.2mm x 30.5mm） 工作溫度:0°C ~ 70°C 標準包裝:1
DLP-IO14 功能描述:數(shù)據(jù)記錄與采集 14-Channel Data-Acq Module RoHS:否 制造商:Lantronix 描述/功能:Analog device server 顯示器類型:None 電流額定值:
DLP-IO16 功能描述:界面模塊 USB/Micro Dev Board RoHS:否 制造商:4D Systems 產(chǎn)品:Serial Converters 通道/端口數(shù)量: 數(shù)據(jù)速率: 接口類型:USB, UART 工作電源電壓:3.3 V, 5 V 最大工作溫度:
DLP-IO20 功能描述:數(shù)據(jù)記錄與采集 USB-BASED 20-CHANNEL DATA ACQUISITION MOD RoHS:否 制造商:Lantronix 描述/功能:Analog device server 顯示器類型:None 電流額定值:
DLP-IO26 功能描述:開發(fā)板和工具包 - PIC / DSPIC USB/Micro Dev Board RoHS:否 制造商:Microchip Technology 產(chǎn)品:Starter Kits 工具用于評估:chipKIT 核心:Uno32 接口類型: 工作電源電壓:
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