參數(shù)資料
型號: DM164134
廠商: Microchip Technology
文件頁數(shù): 100/116頁
文件大?。?/td> 0K
描述: KIT DEV PIC18F4XK22
標準包裝: 1
系列: PIC® 18F
類型: MCU
適用于相關產品: PIC18F4XK22,PIC18F2XK22
所含物品: 板,文檔
PIC18FXX8
DS41159E-page 82
2006 Microchip Technology Inc.
8.2
PIR Registers
The Peripheral Interrupt Request (PIR) registers
contain the individual flag bits for the peripheral
interrupts (Register 8-4 through Register 8-6). Due to
the number of peripheral interrupt sources, there are
three Peripheral Interrupt Request (Flag) registers
(PIR1, PIR2, PIR3).
REGISTER 8-4:
PIR1: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 1
Note 1: Interrupt flag bits are set when an interrupt
condition occurs regardless of the state of
its corresponding enable bit or the Global
Interrupt
Enable
bit,
GIE
(INTCON
register).
2: User software should ensure the appropri-
ate interrupt flag bits are cleared prior to
enabling an interrupt and after servicing
that interrupt.
R/W-0
R-0
R/W-0
PSPIF(1)
ADIF
RCIF
TXIF
SSPIF
CCP1IF
TMR2IF
TMR1IF
bit 7
bit 0
bit 7
PSPIF: Parallel Slave Port Read/Write Interrupt Flag bit(1)
1
= A read or a write operation has taken place (must be cleared in software)
0
= No read or write has occurred
bit 6
ADIF: A/D Converter Interrupt Flag bit
1
= An A/D conversion completed (must be cleared in software)
0
= The A/D conversion is not complete
bit 5
RCIF: USART Receive Interrupt Flag bit
1
= The USART receive buffer, RCREG, is full (cleared when RCREG is read)
0
= The USART receive buffer is empty
bit 4
TXIF: USART Transmit Interrupt Flag bit
1
= The USART transmit buffer, TXREG, is empty (cleared when TXREG is written)
0
= The USART transmit buffer is full
bit 3
SSPIF: Master Synchronous Serial Port Interrupt Flag bit
1
= The transmission/reception is complete (must be cleared in software)
0
= Waiting to transmit/receive
bit 2
CCP1IF: CCP1 Interrupt Flag bit
Capture mode:
1
= A TMR1 register capture occurred (must be cleared in software)
0
= No TMR1 register capture occurred
Compare mode:
1
= A TMR1 register compare match occurred (must be cleared in software)
0
= No TMR1 register compare match occurred
PWM mode:
Unused in this mode.
bit 1
TMR2IF: TMR2 to PR2 Match Interrupt Flag bit
1
= TMR2 to PR2 match occurred (must be cleared in software)
0
= No TMR2 to PR2 match occurred
bit 0
TMR1IF: TMR1 Overflow Interrupt Flag bit
1
= TMR1 register overflowed (must be cleared in software)
0
= TMR1 register did not overflow
Note 1: This bit is only available on PIC18F4X8 devices. For PIC18F2X8 devices, this bit
is unimplemented and reads as ‘0’.
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
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