參數(shù)資料
型號: DM164134
廠商: Microchip Technology
文件頁數(shù): 89/116頁
文件大?。?/td> 0K
描述: KIT DEV PIC18F4XK22
標準包裝: 1
系列: PIC® 18F
類型: MCU
適用于相關產(chǎn)品: PIC18F4XK22,PIC18F2XK22
所含物品: 板,文檔
PIC18FXX8
DS41159E-page 72
2006 Microchip Technology Inc.
EXAMPLE 6-3:
WRITING TO FLASH PROGRAM MEMORY
MOVLW
D'64
; number of bytes in erase block
MOVWF
COUNTER
MOVLW
high (BUFFER_ADDR)
; point to buffer
MOVWF
FSR0H
MOVLW
low (BUFFER_ADDR)
MOVWF
FSR0L
MOVLW
upper (CODE_ADDR)
; Load TBLPTR with the base
MOVWF
TBLPTRU
; address of the memory block
MOVLW
high (CODE_ADDR)
MOVWF
TBLPTRH
MOVLW
low (CODE_ADDR)
MOVWF
TBLPTRL
READ_BLOCK
TBLRD*+
; read into TABLAT, and inc
MOVF
TABLAT, W
; get data
MOVWF
POSTINC0
; store data
DECFSZ
COUNTER
; done?
BRA
READ_BLOCK
; repeat
MODIFY_WORD
MOVLW
DATA_ADDR_HIGH
; point to buffer
MOVWF
FSR0H
MOVLW
DATA_ADDR_LOW
MOVWF
FSR0L
MOVLW
NEW_DATA_LOW
; update buffer word
MOVWF
POSTINC0
MOVLW
NEW_DATA_HIGH
MOVWF
INDF0
ERASE_BLOCK
MOVLW
upper (CODE_ADDR)
; load TBLPTR with the base
MOVWF
TBLPTRU
; address of the memory block
MOVLW
high (CODE_ADDR)
MOVWF
TBLPTRH
MOVLW
low (CODE_ADDR)
MOVWF
TBLPTRL
BSF
EECON1, EEPGD
; point to FLASH program memory
BCF
EECON1, CFGS
; access FLASH program memory
BSF
EECON1, WREN
; enable write to memory
BSF
EECON1, FREE
; enable Row Erase operation
BCF
INTCON, GIE
; disable interrupts
MOVLW
55h
Required
MOVWF
EECON2
; write 55H
Sequence
MOVLW
0AAh
MOVWF
EECON2
; write AAH
BSF
EECON1, WR
; start erase (CPU stall)
NOP
BSF
INTCON, GIE
; re-enable interrupts
TBLRD*-
; dummy read decrement
WRITE_BUFFER_BACK
MOVLW
8
; number of write buffer groups of 8 bytes
MOVWF
COUNTER_HI
MOVLW
high (BUFFER_ADDR)
; point to buffer
MOVWF
FSR0H
MOVLW
low (BUFFER_ADDR)
MOVWF
FSR0L
PROGRAM_LOOP
MOVLW
8
; number of bytes in holding register
MOVWF
COUNTER
WRITE_WORD_TO_HREGS
MOVFW
POSTINC0, W
; get low byte of buffer data
MOVWF
TABLAT
; present data to table latch
TBLWT+*
; write data, perform a short write
; to internal TBLWT holding register.
DECFSZ
COUNTER
; loop until buffers are full
BRA
WRITE_WORD_TO_HREGS
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