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參數(shù)資料
| 型號： | DS1846E-010+T&R |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 13/18頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC NV TRI-POT MEM MON 20TSSOP |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,500 |
| 接片： | 100，256 |
| 電阻（歐姆）： | 10k，100k |
| 電路數(shù)： | 3 |
| 溫度系數(shù)： | 標準值 750 ppm/°C |
| 存儲器類型： | 非易失 |
| 接口： | 3 線串行（設備位址） |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 20-TSSOP |
| 包裝： | 帶卷 (TR) |
DS1846
4 of 18
MEMORY ORGANIZATION
The EEPROM of the DS1846 contains 256 bytes. Bytes 00h to F7h are general-purpose user memory.
The next three bytes, F8h, F9h, and FAh, contain the wiper settings for each of the potentiometers (see
Table 1). The last five bytes, FBh to FFh, are reserved and should not be used.
The memory, internal to the device, is organized as 32 pages of eight bytes each. Once an address byte is
clocked into the device through the 2-wire interface, the five MSBs decode which page is to be accessed,
and the three LSBs decode a particular byte on that page. The selected page is shadowed in SRAM as a
staging area while data is clocked in or out through the 2-wire interface. When reading any number of
bytes, all eight bytes of the current page are shadowed in SRAM where the requested byte(s) eventually
get clocked out. When reading, the page is incremented automatically, and hence transparent to the user.
When performing a write, the page of the starting address is shadowed in SRAM. The new data is then
written to the SRAM. When the end of the page is reached, the address returns to the beginning of the
same page. When the 2-wire master issues a stop, the entire page (even if only a single byte changed) is
copied from the SRAM into EEPROM. All reads and writes to the EEPROM are actually executed as
page operations even though they are invisible to the user when performing single byte reads and writes.
Understanding the internal memory organization is important when performing sequential address writes
due to page boundaries. See the Write Operations in the 2-WIRE OPERATION section for more
information.
MEMORY LOCATIONS Table 1
MEMORY
LOCATION
NAME OF MEMORY
LOCATION
FUNCTION OF MEMORY LOCATION
00h to F7h
User Memory
General-purpose user memory.
F8h
Potentiometer 1 Setting
Writing to this byte controls the setting of potentiometer 1, a
256-position pot. Valid settings are 00h to FFh.
F9h
Potentiometer 0 Setting
Writing to this byte controls the setting of potentiometer 0, a
100-position pot. Valid settings are 00h to 63h. MSB is ignored.
FAh
Potentiometer 2 Setting
Writing to this byte controls the setting of potentiometer 0, a
100-position pot. Valid settings are 00h to 63h. MSB is ignored.
FBh to FFh
Reserved
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| DS1847E-010/T&R | IC RES TEMP-CNTRL 10/10K 14TSSOP |
| DS1848B-C10+ | IC RES/MEM TEMP 10/10K 16-CSBGA |
| DS1852B-000/T&R | IC MONITOR TXRX OPTICAL 25-BGA |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DS1847 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Dual Temperature-Controlled NV Variable Resistor |
| DS1847-010 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Dual Temperature-Controlled NV Variable Resistor |
| DS1847-050 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Dual Temperature-Controlled NV Variable Resistor |
| DS1847B-010 | 功能描述:數(shù)字電位計 IC RoHS:否 制造商:Maxim Integrated 電阻:200 Ohms 溫度系數(shù):35 PPM / C 容差:25 % POT 數(shù)量:Dual 每 POT 分接頭:256 弧刷存儲器:Volatile 緩沖刷: 數(shù)字接口:Serial (3-Wire, SPI) 描述/功能:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 工作電源電壓:1.7 V to 5.5 V 電源電流:27 uA 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:TQFN-16 封裝:Reel |
| DS1847B-010/T&R | 制造商:Maxim Integrated Products 功能描述:DUAL NV TEMP CNTRL VAR RES 10/10K T - Tape and Reel |
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