(-40°C to +85°C; VCC = 4.5V to 5.5V)
參數(shù)資料
型號: DS1846E-010+T&R
廠商: Maxim Integrated Products
文件頁數(shù): 8/18頁
文件大?。?/td> 0K
描述: IC NV TRI-POT MEM MON 20TSSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
接片: 100,256
電阻(歐姆): 10k,100k
電路數(shù): 3
溫度系數(shù): 標(biāo)準(zhǔn)值 750 ppm/°C
存儲(chǔ)器類型: 非易失
接口: 3 線串行(設(shè)備位址)
電源電壓: 4.5 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 20-TSSOP
包裝: 帶卷 (TR)
DS1846
16 of 18
AC ELECTRICAL CHARACTERISTICS
(-40°C to +85°C; VCC = 4.5V to 5.5V)
PARAMETER
SYMBOL CONDITION
MIN
TYP MAX UNITS NOTES
SCL Clock Frequency
f
SCL
Fast mode
Standard mode
0
400
100
kHz
4
Bus Free Time
Between Stop and
Start Condition
t
BUF
Fast mode
Standard mode
1.3
4.7
ms
4
Hold Time (Repeated)
Start Condition
t
HD:STA
Fast mode
Standard mode
0.6
4.0
ms
4, 5
Low Period of SCL
Clock
t
LOW
Fast mode
Standard mode
1.3
4.7
ms
4
High Period of SCL
Clock
t
HIGH
Fast mode
Standard mode
0.6
4.0
ms
4
Data Hold Time
t
HD:DAT
Fast mode
Standard mode
0
0.9
ms
4, 6, 7
Data Setup Time
t
SU:DAT
Fast mode
Standard mode
100
250
ns
4
Rise Time of Both
SDA and SCL Signals
t
R
Fast mode
Standard mode
20 + 0.1C
B
300
1000
ns
8
Fall Time of Both
SDA and SCL Signals
t
F
Fast mode
Standard mode
20 + 0.1C
B
300
ns
8
Setup Time for Stop
Condition
t
SU:STO
Fast mode
Standard mode
0.6
4.0
ms
Pulse Width of Spikes
(which must be suppressed
by input filter
)
tSP
Fast mode
0
50
ns
Capacitive Load for
each Bus Line
C
B
400
pF
8
EEPROM Write Time
tW
310
ms
9
PBRST
= VIL
tPB
150
ns
Reset Active Time
tRST
200
320
550
ms
VCC Detect to RST and
RST
(Power-Down)
tRPD
58
ms
16
VCC Slew Rate
tVF
20
ms
VCC Detect to RST and
RST
(Power-Up)
tRPU
200
320
550
ms
15
VCC Slew Rate
tVR
0ns
PBRST
Stable Low to
RST and RST
tPDLY
250
ns
IN Detect (Falling) to
NMI
tIPD
58
ms
16
IN Detect (Rising) to
NMI
tNMI
200
700
ms
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