參數(shù)資料
型號: DS2196LN+
廠商: Maxim Integrated Products
文件頁數(shù): 94/157頁
文件大?。?/td> 0K
描述: IC FRAMER DUAL T1 LIU 100-LQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 90
控制器類型: T1 調(diào)幀器
接口: 并行/串行
電源電壓: 3.135 V ~ 3.465 V
電流 - 電源: 85mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-LQFP(14x14)
包裝: 托盤
DS2196
41 of 157
CCR2B: COMMON CONTROL REGISTER 2 FRAMER B (Address = D8 Hex)
(MSB)
(LSB)
TFM
TB8ZS
TSLC96
TZSE
RFM
RB8ZS
RSLC96
RFDL
SYMBOL
POSITION
NAME AND DESCRIPTION
TFM
CCR2B.7
Transmit Frame Mode Select.
0 = D4 framing mode
1 = ESF framing mode
TB8ZS
CCR2B.6
Transmit B8ZS Enable.
0 = B8ZS disabled
1 = B8ZS enabled
TSLC96
CCR2B.5
Transmit SLC–96 / Fs–Bit Insertion Enable. Only set this
bit to a 1 in D4 framing applications. Must be set to 1 to source
the Fs pattern. See Section 18 for details.
0 = SLC–96/Fs–bit insertion disabled
1 = SLC–96/Fs–bit insertion enabled
TZSE
CCR2B.4
Transmit FDL Zero Stuffer Enable. Set this bit to 0 if using
the internal HDLC/BOC controller instead of the legacy support
for the FDL. See Section 18 for details.
0 = zero stuffer disabled
1 = zero stuffer enabled
RFM
CCR2B.3
Receive Frame Mode Select.
0 = D4 framing mode
1 = ESF framing mode
RB8ZS
CCR2B.2
Receive B8ZS Enable.
0 = B8ZS disabled
1 = B8ZS enabled
RSLC96
CCR2B.1
Receive SLC–96 Enable. Only set this bit to a 1 in D4/SLC–
96 framing applications. See Section 18 for details.
0 = SLC–96 disabled
1 = SLC–96 enabled
RFDL
CCR2B.0
Receive FDL Zero Destuffer Enable. Set this bit to 0 if using
the internal HDLC/BOC controller instead of the legacy support
for the FDL. See Section 18 for details.
0 = zero destuffer disabled
1 = zero destuffer enabled
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