參數(shù)資料
型號: DS21Q42T+
廠商: Maxim Integrated Products
文件頁數(shù): 38/116頁
文件大?。?/td> 0K
描述: IC FRAMER ENHANCED T1 4X 128TQFP
標(biāo)準(zhǔn)包裝: 72
控制器類型: T1 調(diào)幀器
接口: 并行/串行
電源電壓: 2.97 V ~ 3.63 V
電流 - 電源: 75mA
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 128-LQFP
供應(yīng)商設(shè)備封裝: 128-LQFP(14x20)
包裝: 管件
DS21Q42
28 of 116
SYMBOL
POSITION
NAME AND DESCRIPTION
SYNCE
RCR1.1
Sync Enable.
0 = auto resync enabled
1 = auto resync disabled
RESYNC
RCR1.0
Resync. When toggled from low to high, a resynchronization of the
receive side framer is initiated. Must be cleared and set again for a
subsequent resync.
RCR2: RECEIVE CONTROL REGISTER 2 (Address=2C Hex)
(MSB)
(LSB)
RCS
RZBTSI
RSDW
RSM
RSIO
RD4YM
FSBE
MOSCRF
SYMBOL
POSITION
NAME AND DESCRIPTION
RCS
RCR2.7
Receive Code Select. See Section 11 for more details.
0 = idle code (7F Hex)
1 = digital milliwatt code (1E/0B/0B/1E/9E/8B/8B/9E Hex)
RZBTSI
RCR2.6
Receive Side ZBTSI Enable.
0 = ZBTSI disabled
1 = ZBTSI enabled
RSDW
RCR2.5
RSYNC Double–Wide. (note: this bit must be set to zero when
RCR2.4 = 1 or when RCR2.3 = 1)
0 = do not pulse double wide in signaling frames
1 = do pulse double wide in signaling frames
RSM
RCR2.4
RSYNC Mode Select. (A Don’t Care if RSYNC is programmed as
an input)
0 = frame mode (see the timing in Section 20)
1 = multiframe mode (see the timing in Section 20)
RSIO
RCR2.3
RSYNC I/O Select. (note: this bit must be set to zero when CCR1.2
= 0)
0 = RSYNC is an output
1 = RSYNC is an input (only valid if elastic store enabled)
RD4YM
RCR2.2
Receive Side D4 Yellow Alarm Select.
0 = zeros in bit 2 of all channels
1 = a one in the S–bit position of frame 12
FSBE
RCR2.1
PCVCR Fs–Bit Error Report Enable.
0 = do not report bit errors in Fs–bit position; only Ft bit position
1 = report bit errors in Fs–bit position as well as Ft bit position
MOSCRF
RCR2.0
Multiframe Out of Sync Count Register Function Select.
0 = count errors in the framing bit position
1 = count the number of multiframes out of sync
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