參數(shù)資料
型號(hào)： DS26303LN-75+A3
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 9/101頁(yè)
文件大小： 0K
描述： IC LIU E1/T1/J1 3.3V 144-ELQFP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 1
類型： 線路接口裝置（LIU）
驅(qū)動(dòng)器/接收器數(shù)： 8/8
規(guī)程： T1/E1/J1
電源電壓： 3.135 V ~ 3.465 V
安裝類型： 表面貼裝
封裝/外殼： 144-LQFP 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 144-LQFP 裸露焊盤(pán)
包裝： 托盤(pán)
其它名稱： 90-26303+7N3
DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
15 of 101
NAME
PIN
TYPE
FUNCTION
SCLK/ALE/
ASB/TS2
86
I
Serial Clock/Address Latch Enable/Address Strobe
Bar/Template Selection 2
SCLK:
In the serial host mode, this pin is the serial clock. Data on
SDI is clocked on the rising edge of SCLK. The data is clocked on
SDO on the rising edge of SCLK if CLKE is high. If CLKE is low
the data on SDO is clocked on the falling edge of SCLK.
ALE:
In parallel Intel multiplexed mode, the address lines are
latched on the falling edge of ALE. Tie ALE pin high if using
nonmultiplexed mode.
ASB:
In parallel Motorola multiplexed mode, the address is
sampled on the falling edge of ASB. Tie ASB pin high if using
nonmultiplexed mode.
TS2:
In hardware mode, this pin signal is one of the template
selection bits. See Table 5-11.
RDB/RWB/TS1
85
I
Read Bar/Read Write Bar/Template Selection 1
RDB:
In Intel host mode, this pin must be low for read operation.
RWB:
In Motorola mode, this pin is low for write operation and
high for read operation.
TS1:
In hardware mode, this pin signal is one of the template
selection bits. See Table 5-11.
SDI/WRB/DSB/TS0
84
I
Serial Data Input/Write Bar/Data Strobe Bar/Template
Selection 0
SDI:
In the serial host mode, this pin is the serial input SDI. It is
sampled on the rising edge of SCLK. Data is input LSB first.
WRB:
In Intel host mode, this pin is active low during write
operation. The data is sampled on the rising edge of WRB.
DSB:
In the parallel Motorola mode, this pin is active low. During a
write operation the data is sampled on the rising edge of DSB.
During a read operation the data (D[7:0] or AD[7:0]) is driven on
the falling edge of DSB. In the nonmultiplexed Motorola mode, the
address bus (A[5:0]) is latched on the falling edge of DSB.
TS0:
In hardware mode, this pin signal is one of the template
select bits. See Table 5-11.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS26303LN-XXX 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
DS26303LN-XXX+ 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
DS26303L-XXX 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
DS26303L-XXX+ 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
DS26-32.768-STD-020 制造商:Micro Crystal Switzerland 功能描述:
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