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參數(shù)資料
型號: DS26303LN-75+A3
廠商: Maxim Integrated Products
文件頁數(shù): 92/101頁
文件大?。?/td> 0K
描述: IC LIU E1/T1/J1 3.3V 144-ELQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 8/8
規(guī)程: T1/E1/J1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 144-LQFP 裸露焊盤
包裝: 托盤
其它名稱: 90-26303+7N3
DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
90 of 101
Table 10-6. Motorola Write Cycle Characteristics
(VDD = 3.3V ±5%, Tj = -40°C to +125°C.) (Note 1) (See Figure 10-7 and Figure 10-8.)
SIGNAL
NAME(S)
SYMBOL
DESCRIPTION
MIN
TYP
MAX
UNITS
DSB
t1
Pulse Width (Note 2)
60
ns
CSB
t2
Setup Time to DSB Active (Note 2)
0
ns
CSB
t3
Hold Time from DSB Inactive (Note 2)
0
ns
RWB
t4
Setup Time to DSB Active (Note 2)
10
ns
RWB
t5
Hold Time to DSB Inactive (Note 2)
0
ns
AD[7:0]
t6
Setup Time to ASB/DSB Active (Notes 2, 3)
10
ns
AD[7:0]
t7
Hold Time from ASB/DSB Active (Notes 2, 3)
5
ns
AD[7:0], D[7:0]
t8
Setup Time to DSB Inactive (Note 2)
40
ns
AD[7:0], D[7:0]
t9
Hold Time from DSB Inactive (Note 2)
30
ns
A[5:0]
t10
Assert Time from DSB Active (Note 2)
40
ns
ACKB
t11
Output Delay from DSB Inactive (Note 2)
0
12
ns
ASB
t12
Active Time to DSB Active (Note 2)
10
ns
Note 1:
The timing parameters in this table are guaranteed by design (GBD).
Note 2:
The input/output timing reference level for all signals is VDD/2.
Note 3:
In a nonmux cycle, the timing reference refers only to the DSB signal. While in a mux cycle, the timing reference refers only to the
ASB signal.
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DS26303LN-XXX 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
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