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參數(shù)資料
| 型號(hào)： | DS3171 |
| 英文描述： | Single/Dual/Triple/Quad DS3/E3 Single-Chip Transceivers |
| 中文描述： | 單/雙/三/四路、DS3/E3單芯片收發(fā)器 |
| 文件頁(yè)數(shù)： | 29/232頁(yè) |
| 文件大?。?/td> | 2133K |
| 代理商： | DS3171 |
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DS3171/DS3172/DS3173/DS3174
29 of 230
PIN NAME
TYPE
PIN DESCRIPTION
This output is enabled when the TX LIU is enabled and the output is enabled to be
driven. When it is not enabled, it is in a high impedance state.
o
DS3: 44.736 Mbps +20ppm
o
E3: 34.368 Mbps +20ppm
Receive Positive analog
RXPn
: This pin and the RXNn pin form a differential AMI input which is coupled to the
outbound 75 coaxial cable through a 2:1 step-up transformer (
Figure 1-1
). This input
is used when the RX LIU is enabled and is ignored when the LIU is disabled.
o
DS3: 44.736 Mbps +20ppm
o
E3: 34.368 Mbps +20ppm
Receive Negative analog
RXNn
: This pin and the RXPn pin form a differential AMI input which is coupled to the
outbound 75 coaxial cable through a 2:1 step-up transformer (
Figure 1-1
). This input
is used when the LIU is enabled and is ignored when the LIU is disabled.
o
DS3: 44.736 Mbps +20ppm
o
E3: 34.368 Mbps +20ppm
Receive Line Clock Input
RLCLKn
: This clock is typically used for the reference clock for the RPOSn / RDATn,
RNEGn / RLCVn signals but can also be used as the reference clock for the RSERn,
RSOFOn / RDENn, TSOFIn, TSERn, TSOFOn / TDENn, TPOSn / TDATn and
TNEGn signals. This input is ignored when the LIU is enabled.
This input signal can be inverted.
o
DS3: 44.736 MHz +20 ppm
o
E3: 34.368 MHz +20 ppm
Receive Positive AMI / Data
RPOSn
: When the port line is configured for B3ZS, HDB3 or AMI mode and the LIU is
disabled, a high on this pin indicates that a positive pulse has been detected using an
external LIU. The signal is sampled on the positive clock edge of the referenced clock
pin if the clock pin signal is not inverted, otherwise it is sampled on the falling edge of
the clock. The signal is typically referenced to the RLCLKn line clock input pins, but it
can be referenced to the RCLKOn output pins.
This input signal can be inverted.
RDATn
: When the port line interface is configured for UNI mode, the un-encoded
receive signal is input on this pin. The signal is sampled on the positive clock edge of
the referenced clock pin if the clock pin signal is not inverted, otherwise it is sampled
on the falling edge of the clock. The signal is typically referenced to the RLCLKn line
clock input pins, but it can be referenced to the RCLKOn output pins.
This input signal can be inverted.
o
DS3: 44.736 Mbps +20ppm
o
E3: 34.368 Mbps +20ppm
Receive Negative AMI / Line Code Violation / Line OH Mask input
RNEGn
: When the port line is configured for B3ZS, HDB3 or AMI mode and the LIU is
disabled, a high on this pin indicates that a negative pulse has been detected using
an external LIU. The signal is sampled on the positive clock edge of the referenced
clock pin if the clock pin signal is not inverted, otherwise it is sampled on the falling
edge of the clock. The signal is typically referenced to the RLCLKn line clock input
pins, but it can be referenced to the RCLKOn output pins.
This input signal can be inverted.
o
DS3: 44.736 Mbps +20ppm
o
E3: 34.368 Mbps +20ppm
RLCVn
: When the port line interface is configured for UNI mode, the BPV counter in
the encoder/decoder block is incremented each clock when this signal is high. The
signal is sampled on the positive clock edge of the referenced clock pin if the clock
pin signal is not inverted, otherwise it is sampled on the falling edge of the clock. The
signal is typically referenced to the RLCLKn line clock input pins, but it can be
RXPn
Ia
RXNn
Ia
RLCLKn
I
RPOSn /
RDATn
Iad
RNEGn /
RLCVn
Iad
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS3171N | Single/Dual/Triple/Quad DS3/E3 Single-Chip Transceivers |
| DS3172 | Single/Dual/Triple/Quad DS3/E3 Single-Chip Transceivers |
| DS3172N | Single/Dual/Triple/Quad DS3/E3 Single-Chip Transceivers |
| DS3173 | Single/Dual/Triple/Quad DS3/E3 Single-Chip Transceivers |
| DS3173N | Single/Dual/Triple/Quad DS3/E3 Single-Chip Transceivers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS3171N | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Single DS3/E3 Single Chip Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS3171N+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Single DS3/E3 Single Chip Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS3172 | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Dual DS3/E3 Single Chip Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS3172+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Dual DS3/E3 Single Chip Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS3172N | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Dual DS3/E3 Single Chip Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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