參數(shù)資料
型號: DSP56857BUE
廠商: Freescale Semiconductor
文件頁數(shù): 36/53頁
文件大?。?/td> 0K
描述: IC DSP 16BIT 120MHZ 100-LQFP
標準包裝: 90
系列: 568xx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 120MHz
連通性: SCI,SPI,SSI
外圍設(shè)備: DMA,POR,WDT
輸入/輸出數(shù): 47
程序存儲器容量: 80KB(40K x 16)
程序存儲器類型: SRAM
RAM 容量: 24K x 16
電壓 - 電源 (Vcc/Vdd): 1.62 V ~ 1.98 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-LQFP
包裝: 托盤
Serial Communication Interface (SCI) Timing
56857 Technical Data, Rev. 6
Freescale Semiconductor
41
Figure 4-27 Slave Mode Clock Timing
4.11 Serial Communication Interface (SCI) Timing
Table 4-13 SCI Timing4
Operating Conditions: VSS = VSSIO = VSSA = 0 V, VDD = 1.62-1.98V, VDDIO = VDDA = 3.0–3.6V, TA = –40° to +120°C, CL ≤ 50pF, fop = 120MHz
Characteristic
Symbol
Min
Max
Unit
Baud Rate1
1. fMAX is the frequency of operation of the system clock in MHz.
BR
(fMAX)/(32)
Mbps
RXD2 Pulse Width
2. The RXD pin in SCI0 is named RXD0 and the RXD pin in SCI1 is named RXD1.
RXDPW
0.965/BR
1.04/BR
ns
TXD3 Pulse Width
3. The TXD pin in SCI0 is named TXD0 and the TXD pin in SCI1 is named TXD1.
4. Parameters listed are guaranteed by design.
TXDPW
0.965/BR
1.04/BR
ns
tTHS
tTSS
tHS
tSS
tRFSWLS
tRFSWHS
tRFBLS
tRFSBHS
tTXHIS
tTXNVS
tFTXVS
tTXVS
tFTXES
tTXES
tTFSWLS
tTFSWHS
tTFSBLS
tTFSBHS
tSCKL
tSCKW
tSCKH
First Bit
Last Bit
SCK input
SC2 (bl) input
SC2 (wl) input
STD
SC0 input
SC1 (bl) input
SC1 (wl) input
SRD
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