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參數(shù)資料
| 型號： | DSP5685xUM |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | 16-bit Digital Signal Controllers |
| 中文描述： | 16位數(shù)字信號控制器 |
| 文件頁數(shù)： | 17/60頁 |
| 文件大?。?/td> | 836K |
| 代理商： | DSP5685XUM |
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Introduction
56854 Technical Data, Rev. 6
Freescale Semiconductor
17
106
HACK
HRRQ
GPIOB15
Input
Open Drain
Output
Input/Output
Host Acknowledge (HACK)
—When the HI08 is programmed for
HRMS=0 functionality (typically used on a single-data-strobe bus),
this input has two functions: (1) provide a Host Acknowledge signal
for DMA transfers or (2) to control handshaking and provide a Host
Interrupt Acknowledge compatible with the MC68000 family
processors.
These pins are disconnected internally.
Receive Host Request (HRRQ)
—This signal is the Receive Host
Request output when the HI08 is programmed for HRMS=1
functionality and is typically used on a double-data-strobe bus.
Port B GPIO(15)
—This pin is a General Purpose I/O (GPIO) pin
when not configured for host port usage.
101
TIO0
GPIOG0
Input
/Output
Input/Output
Timer Input/Outputs (TIO0)
—This pin can be independently
configured to be either a timer input source or an output flag.
Port G GPIO (0)
—This pin is a General Purpose I/O (GPIO) pin that
can individually be programmed as an input or output pin.
99
TIO1
GPIOG1
Input
/Output
Input/Output
Timer Input/Outputs (TIO1)
—This pin can be independently
configured to be either a timer input source or an output flag.
Port G GPIO (1)
—This pin is a General Purpose I/O (GPIO) pin that
can individually be programmed as an input or output pin.
98
TIO2
GPIOG2
Input
/Output
Input/Output
Timer Input/Outputs (TIO2)
—This pin can be independently
configured to be either a timer input source or an output flag.
Port G GPIO (2)
—This pin is a General Purpose I/O (GPIO) pin that
can individually be programmed as an input or output pin.
97
TIO3
GPIOG3
Input
/Output
Input/Output
Timer Input/Outputs (TIO3)
—This pin can be independently
configured to be either a timer input source or an output flag.
Port G GPIO (3)
—This pin is a General Purpose I/O (GPIO) pin that
can individually be programmed as an input or output pin.
20
IRQA
Input
External Interrupt Request A and B
—The IRQA and IRQB inputs
are asynchronous external interrupt requests that indicate that an
external device is requesting service. A Schmitt trigger input is used
for noise immunity. They can be programmed to be level-sensitive
or negative-edge- triggered. If level-sensitive triggering is selected,
an external pull-up resistor is required for Wired-OR operation.
21
IRQB
Table 3-1. 56854 Signal and Package Information for the 128-pin LQFP (Continued)
Pin No.
Signal Name
Type
Description
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|---|---|
| DSP56854E | 16-bit Digital Signal Controllers |
| DSP56854FG120 | 16-bit Digital Signal Controllers |
| DSP56855BU120 | 16-bit Digital Signal Controllers |
| DSP56855BUE | 16-bit Digital Signal Controllers |
| DSP56855E | 16-bit Digital Signal Controllers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSP5685XUMAD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP5685XUMAD Rev 2.0 Addendum |
| DSP56ADC16D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 16-Bit |
| DSP56ADC16L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 16-Bit |
| DSP56ADC16P | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 16-Bit |
| DSP56ADC16S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
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