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參數(shù)資料
| 型號： | DSP5685xUM |
| 廠商： | 飛思卡爾半導體(中國)有限公司 |
| 英文描述： | 16-bit Digital Signal Controllers |
| 中文描述： | 16位數(shù)字信號控制器 |
| 文件頁數(shù)： | 21/60頁 |
| 文件大?。?/td> | 836K |
| 代理商： | DSP5685XUM |
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Introduction
56854 Technical Data, Rev. 6
Freescale Semiconductor
21
4
SS
GPIOF3
Input
Input/Output
SPI Slave Select (SS)
—This input pin selects a slave device before
a master device can exchange data with the slave device. SS must
be low before data transactions and must stay low for the duration
of the transaction. The SS line of the master must be held high.
Port F GPIO (3)
—This pin is a General Purpose I/O (GPIO) pin that
can individually be programmed as input or output pin.
24
XTAL
Input/
Output
Crystal Oscillator Output (XTAL)
—This output connects the
internal crystal oscillator output to an external crystal. If an external
clock source other than a crystal oscillator is used, XTAL must be
used as the input.
25
EXTAL
Input
External Crystal Oscillator Input (EXTAL)
—This input should be
connected to an external crystal. If an external clock source other
than a crystal oscillator is used, EXTAL must be tied off. See
Section 4.5.2
33
CLKO
Output
Clock Output (CLKO)
—This pin outputs a buffered clock signal.
When enabled, this signal is the system clock divided by four.
54
TCK
Input
Test Clock Input (TCK)
—This input pin provides a gated clock to
synchronize the test logic and to shift serial data to the
JTAG/Enhanced OnCE port. The pin is connected internally to a
pull-down resistor.
52
TDI
Input
Test Data Input (TDI)
—This input pin provides a serial input data
stream to the JTAG/Enhanced OnCE port. It is sampled on the
rising edge of TCK and has an on-chip pull-up resistor.
51
TDO
Output (Z)
Test Data Output (TDO)
—This tri-statable output pin provides a
serial output data stream from the JTAG/Enhanced OnCE port. It is
driven in the Shift-IR and Shift-DR controller states, and changes on
the falling edge of TCK.
53
TMS
Input
Test Mode Select Input (TMS)
—This input pin is used to sequence
the JTAG TAP controller’s state machine. It is sampled on the rising
edge of TCK and has an on-chip pull-up resistor.
Note:
Always tie the TMS pin to V
DD
through a 2.2K resistor.
Table 3-1. 56854 Signal and Package Information for the 128-pin LQFP (Continued)
Pin No.
Signal Name
Type
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DSP56854E | 16-bit Digital Signal Controllers |
| DSP56854FG120 | 16-bit Digital Signal Controllers |
| DSP56855BU120 | 16-bit Digital Signal Controllers |
| DSP56855BUE | 16-bit Digital Signal Controllers |
| DSP56855E | 16-bit Digital Signal Controllers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSP5685XUMAD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP5685XUMAD Rev 2.0 Addendum |
| DSP56ADC16D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 16-Bit |
| DSP56ADC16L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 16-Bit |
| DSP56ADC16P | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 16-Bit |
| DSP56ADC16S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
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