參數(shù)資料
型號: DSPB56371AF150
廠商: Freescale Semiconductor
文件頁數(shù): 12/68頁
文件大小: 0K
描述: IC DSP 24BIT 150MHZ 80-LQFP
標(biāo)準(zhǔn)包裝: 90
系列: DSP56K/Symphony
類型: 音頻處理器
接口: 主機(jī)接口,I²C,SAI,SPI
時(shí)鐘速率: 150MHz
非易失內(nèi)存: ROM(384 kB)
芯片上RAM: 264kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 1.25V
工作溫度: -40°C ~ 115°C
安裝類型: 表面貼裝
封裝/外殼: 80-LQFP
供應(yīng)商設(shè)備封裝: 80-LQFP(14x14)
包裝: 托盤
DSP56371 Data Sheet, Rev. 4.1
DSP56371 Overview
Freescale Semiconductor
2
the DSP56300 family of programmable CMOS DSPs. The DSP56371 is targeted to applications that
require digital audio compression/decompression, sound field processing, acoustic equalization and other
digital audio algorithms. Changes in core functionality specific to the DSP56371 are also described in this
manual. See Figure 1. for the block diagram of the DSP56371.
Figure 1. DSP56371 Block Diagram
2.2
DSP56300 Core Description
The DSP56371 uses the DSP56300 core, a high-performance, single clock cycle per instruction engine that
provides up to twice the performance of Motorola's popular DSP56000 core family while retaining code
compatibility with it.
PLL
OnCE
Clock
Gen-
erator
YAB
XAB
PAB
YDB
XDB
PDB
GDB
MODB/IRQB
MODC/IRQC
MODD/IRQD
DSP56300
12
24-Bit
DDB
DAB
Peripheral
Core
YM
_
EB
XM
_
EB
PM
_
EB
PI
O_
EB
Expansion Area
JTAG
4
5
RESET
MODA/IRQA
PINIT/NMI
EXTAL
Address
Generation
Unit
Six Channel
DMA Unit
Program
Interrupt
Controller
Program
Decode
Controller
Program
Address
Generator
Data ALU
24
× 24+56→56-bit MAC
Two 56-bit Accumulators
56-bit Barrel Shifter
Power
Mgmt.
Memory Expansion Area
X Data
RAM
36K
× 24
Y Data
RAM
48K
× 24
Bootstrap
ROM
Internal
Data
Bus
Switch
SHI
Triple
ESAI
ESAI_1
EFCOP
Interface
Timer
Interface Interface
12
2
GPIO
11
ROM
32K
× 24
ROM
32K
× 24
Program
RAM
4K
× 24
ROM
64K
× 24
DAX
2
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