參數(shù)資料
型號: DSPB56371AF150
廠商: Freescale Semiconductor
文件頁數(shù): 26/68頁
文件大小: 0K
描述: IC DSP 24BIT 150MHZ 80-LQFP
標準包裝: 90
系列: DSP56K/Symphony
類型: 音頻處理器
接口: 主機接口,I²C,SAI,SPI
時鐘速率: 150MHz
非易失內(nèi)存: ROM(384 kB)
芯片上RAM: 264kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 1.25V
工作溫度: -40°C ~ 115°C
安裝類型: 表面貼裝
封裝/外殼: 80-LQFP
供應(yīng)商設(shè)備封裝: 80-LQFP(14x14)
包裝: 托盤
DSP56371 Data Sheet, Rev. 4.1
Signal/Connection Descriptions
Freescale Semiconductor
32
3.12 Timer
Table 12. Timer Signal
Signal
Name
Type
State
during
Reset
Signal Description
TIO0
Input or
Output
GPIO Input Timer 0 Schmitt-Trigger Input/Output—When timer 0 functions as an
external event counter or in measurement mode, TIO0 is used as input.
When timer 0 functions in watchdog, timer, or pulse modulation mode,
TIO0 is used as output.
The default mode after reset is GPIO input. This can be changed to
output or configured as a timer input/output through the timer 0
control/status register (TCSR0). If TIO0 is not being used, it is
recommended to either define it as GPIO output immediately at the
beginning of operation or leave it defined as GPIO input but connected
to VDD through a pull-up resistor in order to ensure a stable logic level
at this input.
Internal Pull down resistor.
This input is 5 V tolerant.
TIO1
Input or
Output
GPIO Input Timer 1 Schmitt-Trigger Input/Output—When timer 1 functions as an
external event counter or in measurement mode, TIO1 is used as input.
When timer 1 functions in watchdog, timer, or pulse modulation mode,
TIO1 is used as output.
The default mode after reset is GPIO input. This can be changed to
output or configured as a timer input/output through the timer 1
control/status register (TCSR1). If TIO1 is not being used, it is
recommended to either define it as GPIO output immediately at the
beginning of operation or leave it defined as GPIO input but connected
to Vdd through a pull-up resistor in order to ensure a stable logic level at
this input.
Internal Pull down resistor.
This input is 5 V tolerant.
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