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參數(shù)資料
| 型號(hào)： | DSPB56371AF150 |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 13/68頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP 24BIT 150MHZ 80-LQFP |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 系列： | DSP56K/Symphony |
| 類型： | 音頻處理器 |
| 接口： | 主機(jī)接口，I²C，SAI，SPI |
| 時(shí)鐘速率： | 150MHz |
| 非易失內(nèi)存： | ROM（384 kB） |
| 芯片上RAM： | 264kB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 1.25V |
| 工作溫度： | -40°C ~ 115°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 80-LQFP |
| 供應(yīng)商設(shè)備封裝： | 80-LQFP（14x14） |
| 包裝： | 托盤 |
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DSP56371 Data Sheet, Rev. 4.1
Signal/Connection Descriptions
Freescale Semiconductor
20
FSR
Input or output
GPIO
disconnected
Frame Sync for Receiver—This is the receiver frame sync
input/output signal. In the asynchronous mode (SYN=0), the FSR
pin operates as the frame sync input or output used by all the
enabled receivers. In the synchronous mode (SYN=1), it operates
as either the serial flag 1 pin (TEBE=0), or as the transmitter
external buffer enable control (TEBE=1, RFSD=1).
When this pin is configured as serial flag pin, its direction is
determined by the RFSD bit in the RCCR register. When
configured as the output flag OF1, this pin will reflect the value of
the OF1 bit in the SAICR register, and the data in the OF1 bit will
show up at the pin synchronized to the frame sync in normal mode
or the slot in network mode. When configured as the input flag IF1,
the data value at the pin will be stored in the IF1 bit in the SAISR
register, synchronized by the frame sync in normal mode or the slot
in network mode.
PC1
Input, output, or
disconnected
Port C1—When the ESAI is configured as GPIO, this signal is
individually programmable as input, output, or internally
disconnected.
The default state after reset is GPIO disconnected.
Internal Pull down resistor.
This input is 5 V tolerant.
FST
Input or output
GPIO
disconnected
Frame Sync for Transmitter—This is the transmitter frame sync
input/output signal. For synchronous mode, this signal is the frame
sync for both transmitters and receivers. For asynchronous mode,
FST is the frame sync for the transmitters only. The direction is
determined by the transmitter frame sync direction (TFSD) bit in the
ESAI transmit clock control register (TCCR).
PC4
Input, output, or
disconnected
Port C4—When the ESAI is configured as GPIO, this signal is
individually programmable as input, output, or internally
disconnected.
The default state after reset is GPIO disconnected.
Internal Pull down resistor.
This input is 5 V tolerant.
Table 8. Enhanced Serial Audio Interface Signals (continued)
Signal
Name
Signal Type
State during
Reset
Signal Description
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| DSPB56371AF180 | 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC BLANK ROM VERSION 56371 RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| DSPB56371AF180 | 制造商:Freescale Semiconductor 功能描述:Digital Signal Processor (DSP) IC |
| DSPB56374AE | 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC PB-FREE 52 LQFP RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| DSPB56374AEB | 制造商:Freescale Semiconductor 功能描述:52 LQFP PB-FREE W/ BI - Bulk |
| DSPB56374AEC | 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC 52 LQFP AUTOMOTIVE RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
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