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| 型號： | DSPB56371AF150 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 61/68頁 |
| 文件大小： | 0K |
| 描述： | IC DSP 24BIT 150MHZ 80-LQFP |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 系列： | DSP56K/Symphony |
| 類型： | 音頻處理器 |
| 接口： | 主機(jī)接口，I²C，SAI，SPI |
| 時鐘速率： | 150MHz |
| 非易失內(nèi)存： | ROM（384 kB） |
| 芯片上RAM： | 264kB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 1.25V |
| 工作溫度： | -40°C ~ 115°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 80-LQFP |
| 供應(yīng)商設(shè)備封裝： | 80-LQFP（14x14） |
| 包裝： | 托盤 |
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DSP56371 Data Sheet, Rev. 4.1
Electrical Design Considerations
Freescale Semiconductor
64
As noted above, the junction-to-case thermal resistances quoted in this data sheet are determined using the
first definition. From a practical standpoint, that value is also suitable for determining the junction
temperature from a case thermocouple reading in forced convection environments. In natural convection,
using the junction-to-case thermal resistance to estimate junction temperature from a thermocouple
reading on the case of the package will estimate a junction temperature slightly hotter than actual
temperature. Hence, the new thermal metric, thermal characterization parameter or
Ψ
JT, has been defined
to be (TJ – TT)/PD. This value gives a better estimate of the junction temperature in natural convection
when using the surface temperature of the package. Remember that surface temperature readings of
packages are subject to significant errors caused by inadequate attachment of the sensor to the surface and
to errors caused by heat loss to the sensor. The recommended technique is to attach a 40-gauge
thermocouple wire and bead to the top center of the package with thermally conductive epoxy.
21
Electrical Design Considerations
CAUTION
This device contains circuitry protecting against damage due to high static voltage or
electrical fields. However, normal precautions should be taken to avoid exceeding
maximum voltage ratings. Reliability of operation is enhanced if unused inputs are tied to
an appropriate logic voltage level (for example, either GND or VCC). The suggested value
for a pull-up or pull-down resistor is 10 k ohm.
Use the following list of recommendations to assure correct DSP operation:
Provide a low-impedance path from the board power supply to each VCC pin on the DSP and from
the board ground to each GND pin.
Use at least six 0.01–0.1
F bypass capacitors positioned as close as possible to the four sides of
the package to connect the VCC power source to GND.
Ensure that capacitor leads and associated printed circuit traces that connect to the chip VCC and
GND pins are less than 1.2 cm (0.5 inch) per capacitor lead.
Route the DVDD pin carefully to minimize noise.
Use at least a four-layer PCB with two inner layers for VCC and GND.
Because the DSP output signals have fast rise and fall times, PCB trace lengths should be
minimal. This recommendation particularly applies to the IRQA, IRQB, IRQC, and IRQD pins.
Maximum PCB trace lengths on the order of 15 cm (6 inches) are recommended.
Consider all device loads as well as parasitic capacitance due to PCB traces when calculating
capacitance. This is especially critical in systems with higher capacitive loads that could create
higher transient currents in the VCC and GND circuits.
Take special care to minimize noise levels on the VCCP and GNDP pins.
If multiple DSP56371 devices are on the same board, check for cross-talk or excessive spikes on
the supplies due to synchronous operation of the devices.
RESET must be asserted when the chip is powered up. A stable EXTAL signal must be supplied
before deassertion of RESET.
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