182
SAM4CP [DATASHEET]
43051E–ATPL–08/14
The Interrupt Priority Registers (IPR0-IPR10) provide an 8-bit priority field for each interrupt and each register
holds four priority fields.
The CMSIS provides thread-safe code that gives atomic access to the Interrupt Priority Registers.
Table 12-31
shows
how the interrupts, or IRQ numbers, map onto the interrupt registers and corresponding CMSIS variables that have one
bit per interrupt.
Note:
1.
Each array element corresponds to a single NVIC register, for example the
ICER[0]
element corresponds to
the ICER0.
12.8.3 Nested Vectored Interrupt Controller (NVIC) User Interface
Table 12-31. Mapping of Interrupts to the Interrupt Variables
Interrupts
CMSIS Array Elements
(1)
Set-enable
Clear-enable
Set-pending
Clear-pending
Active Bit
0 - 31
ISER[0]
ICER[0]
ISPR[0]
ICPR[0]
IABR[0]
32 - 41
ISER[1]
ICER[1]
ISPR[1]
ICPR[1]
IABR[1]
Table 12-32. Nested Vectored Interrupt Controller (NVIC) Register Mapping
Offset
Register
Name
Access
Reset
0xE000E100
Interrupt Set-enable Register 0
NVIC_ISER0
Read/Write
0x00000000
...
...
...
...
...
0xE000E11C
Interrupt Set-enable Register 7
NVIC_ISER7
Read/Write
0x00000000
0XE000E180
Interrupt Clear-enable Register 0
NVIC_ICER0
Read/Write
0x00000000
...
...
...
...
...
0xE000E19C
Interrupt Clear-enable Register 7
NVIC_ICER7
Read/Write
0x00000000
0XE000E200
Interrupt Set-pending Register 0
NVIC_ISPR0
Read/Write
0x00000000
...
...
...
...
...
0xE000E21C
Interrupt Set-pending Register 7
NVIC_ISPR7
Read/Write
0x00000000
0XE000E280
Interrupt Clear-pending Register 0
NVIC_ICPR0
Read/Write
0x00000000
...
...
...
...
...
0xE000E29C
Interrupt Clear-pending Register 7
NVIC_ICPR7
Read/Write
0x00000000
0xE000E300
Interrupt Active Bit Register 0
NVIC_IABR0
Read/Write
0x00000000
...
...
...
...
...
0xE000E31C
Interrupt Active Bit Register 7
NVIC_IABR7
Read/Write
0x00000000
0xE000E400
Interrupt Priority Register 0
NVIC_IPR0
Read/Write
0x00000000
...
...
...
...
...
0xE000E426
Interrupt Priority Register 10
NVIC_IPR10
Read/Write
0x00000000
0xE000EF00
Software Trigger Interrupt Register
NVIC_STIR
Write-only
0x00000000