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EM78P568
8-bit OTP Micro-controller
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* This specification are subject to be changed without notice.
01/31/2004 V4.7
Bit 1 ~ Bit 2 (LCD_C0 ~ LCD_C1) : LCD display control
LCD_C1 LCD_C0 LCD_M LCD Display Control
0
0
0
1
0
1
:
1
1
:
Ps. To change the display duty must set the "LCD_C1 ,LCD_C0" to "00".
The controller can drive LCD directly. The LCD block is made up of common driver, segment driver,
display LCD RAM, common output pins, segment output pins and LCD operating power supply. The basic
structure contains a timing control. This timing control uses the basic frequency 32.768KHz to generate the
proper timing for different duty and display access.
RD PAGE0 Bit 0 ~ Bit 2 are LCD control bits for LCD driver. These LCD control bits determine the duty,
the number of common and the frame frequency. The LCD display (disable, enable, blanking) is controlled
by Bit 1 and Bit 2. The driving duty is decided by Bit 0. The display data is stored in LCD RAM which
address and data access controlled by registers R5 PAGE1 and R6 PAGE1.
User can regulate the contrast of LCD display by IOC5 PAGE0 Bit 0 ~ Bit 3 (BIAS0 ~ BIAS3). Up to 16
levels contrast is convenient for better display.
Bit 3 ~ Bit 6 :
(undefined) not allowed to use
Bit 7 (DETOED) : the interrupt triggering edge control for CTCSS tone detection output
0/1
falling edge/falling and rising
PAGE1 (Counter2 data register)
Bit7
Bit6
Bit5
Bit4
Bit3
CN27
CN26
CN25
CN24
CN23
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
Bit 0 ~ Bit 7 (CN20 ~ CN27) : Counter2's buffer that user can read and write.
Counter2 is a 8-bit up-counter with 8-bit prescaler that user can use RD PAGE1 to preset and read the
counter.(write
preset) After a interruption, it will reload the preset value.
Example for writing :
MOV 0x0D, A ; write the data at accumulator to counter2 (preset)
Example for reading :
MOV A, 0x0D ; read the data at counter2 to accumulator
RE (Interrupt flag, Wake-up control, DAC tone output frequency selection, PWM2 duty latch,
Multiplication result)
PAGE0 (Interrupt flag, Wake-up control bits)
7
6
5
4
3
-
-
-
-
/WUP83
R/W-0
Bit 0 (/WUP80) : PORT80 wake-up control, 0/1
disable/enable P80 pin wake-up function
Bit 1 (/WUP81) : PORT81 wake-up control, 0/1
disable/enable P81 pin wake-up function
Bit 2 (/WUP82) : PORT82 wake-up control, 0/1
disable/enable P82 pin wake-up function
Bit 3 (/WUP83) : PORT83 wake-up control, 0/1
disable/enable P83 pin wake-up function
Bit 4 ~ Bit 7 :
(undefined) not allowed to use
Set when a selected period is reached, reset by software.
Duty
1/4
1/2
:
:
Bias
1/3
1/3
:
:
change duty
Disable(turn off LCD)
Blanking
LCD display enable
Bit2
CN22
R/W-0
Bit1
CN21
R/W-0
Bit0
CN20
R/W-0
2
1
0
/WUP82
R/W-0
/WUP81
R/W-0
/WUP80
R/W-0