參數(shù)資料
型號(hào)： EM78P568
廠商： ELAN Microelctronics Corp .
英文描述： 8-BIT OTP MICRO-CONTROLLER
中文描述： 8位檢察官微控制器
文件頁(yè)數(shù)： 37/61頁(yè)
文件大?。?/td> 568K
代理商： EM78P568
EM78P568
8-bit OTP Micro-controller
__________________________________________________________________________________________________________________________________________________________________
* This specification are subject to be changed without notice.
01/31/2004 V4.7
other is the group of column frequency (TONE2), each group has 4 kinds of frequency, user can get 16
kinds of DTMF frequency totally. Tone generator contains a row frequency sine wave generator for
generating the DTMF signal which selected by IOCD PAGE0, IOCE PAGE0 and a column frequency sine
wave generator for generating the DTMF signal which selected by IOCA PAGE0. This block can generate
single tone by filling one of these two register.
If all the values are low, the power of tone generators will turn off .
TONE2 (IOCA PAGE0) High group freq.
1203.8 (0X5D)
TONE1(IOCD, 699.7Hz(0x0A0)
1
IOCE PAGE0) 772.1Hz(0x091)
4
Low group freq. 854.6Hz(0x083)
7
940.8Hz(0x077)
*
1332.8(0X54)
2
5
8
0
1473.1(0X4C)
3
6
9
#
1646.4(0X44)
A
B
C
D
PAGE1 (Control bits for DAC, DAC tone, Reference)
7
6
DAT/DAD
VREF
DATEN
R/W-0
R/W-0
R/W-0
Bit 0 ~ Bit 2 :
(undefined) not allowed to use
Bit 3(DAST/P67) : DAC enable control or P67 switch
0
switch DAO/P67 pin as normal I/O P67
1
enable DAC, enable DAC output buffer B1 and DAC output to DAO/P67 pin
When this bit is set by software, the DA converter will start converting and output to DAO/P67 pin. If user
clean this bit, DA converter will stop and DAO/P67 pin will be become normal I/O P67.
Also refer to bit 5(DATEN) for DAC power control.
Bit 4(VRSEL) : Reference voltage selection bit for Comparator circuit
0/1
VDD/2.5V from DAC
Also see Fig.16 in the next page.
Bit 5(DATEN) : DAC enable control
0/1
disable/enable DAC and its tone output buffer B2
When this bit is set by software, the DA converter will start converting and output to internal CTCSS
VTX3 end. If user clean this bit, DA converter will stop and DAO tone output buffer B2 is disabled.
Also refer to bit 3(DAST/P67) for DAC power control.
Bit 6(VREF) : Reference voltage selection bit for DA converter circuit
DAC reference setting is shown as following. Also see Fig.16 and Fig.17 in the next page.
ASW3 VREF DATEN DAST/P67 Function
1
x
1
x
select 2.5V ref, enable 2.5V ref, enable DAC,
0
1
1
x
enable buffer B2, buffer B2 output to CTCSS LPF
0
0
1
x
select VDD, disable 2.5V, enable DAC, enable buffer B2
x
1
0
1
select 2.5V ref, enable 2.5V ref, enable DAC, enable buffer B1,
buffer B1 output to DAO/P67 pin
x
0
0
1
select VDD, disable 2.5V, enable DAC, enable buffer B1, buffer B1
output to DAO/P67 pin
Ps. IOCE PAGE1 bit 2 (ASW3), IOCA PAGE1 bit 6 (VREF), IOCA PAGE1 bit 5 (DATEN),IOCA PAGE1
bit 3 (DAST/P67)
5
4
3
2
-
1
-
0
-
VRSEL DAST/P67
R/W-0
R/W-0
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