參數(shù)資料
型號： EM78P568
廠商： ELAN Microelctronics Corp .
英文描述： 8-BIT OTP MICRO-CONTROLLER
中文描述： 8位檢察官微控制器
文件頁數(shù)： 48/61頁
文件大?。?/td> 568K
代理商： EM78P568
EM78P568
8-bit OTP Micro-controller
__________________________________________________________________________________________________________________________________________________________________
* This specification are subject to be changed without notice.
01/31/2004 V4.7
(1) DAC program mode
The below item “1” is for DAC general mode. The below item “2,3” are for DAC tone generator mode.
1. DAT/DAD = 0
DAC general mode, software-program DAC from DA7 ~ DA0 register bits , disable DAC
tone generator
2. DAT/DAD = 1
DAC tone generator mode, hardware-program DAC by setting DAT7 ~ DAT0 register
bits, enable DAC tone generator
3. DAT7 ~ DAT0 = 0
Disable DAC tone generator
(2) DAC output paths
DAST/P67 is used to enable DAC output buffer B1. DATEN is used to enable DAC output buffer B2.
1. External
DAC output from its output buffer B1 to DAO/P67 pin
DAST/P67 = 1
power on DAC, enable DAC output buffer B1, output sent to DAO/P67 pin
2. Internal
DAC output from its output buffer B2 to CTCSS Sub-audio LPF
DATEN = 1
power on DAC, enable DAC output buffer B2, output sent to CTCSS VTX3
(3) Using 2.5V ref and DAC
ASW3
DATEN
DAST/P67
VREF
REFSEL
REFEN
CMPEN
VRSEL
Fig.17 Voltage reference control logic
“2.5V ref.” is the reference voltage used in DAC, Comparator or CTCSS. The voltage reference control logic
process these combination use. For this reference used in Comparator, you just only take care of CMPEN and
VRSEL bits. For this reference used in others, you need to set ASW3, VREF, DATEN and DAST/P67. The
following table shows the least two bits setting to logic “1” (CMPEN=VRSEL=1 or ASW3=DATEN=1 or
VREF=DATEN=1 or VREF=DAST/P67=1) will “select 2.5V and enable 2.5V ref”.
When REFSEL = 1, the 2.5V ref is select not VDD. (select 2.5V ref)
When REFEN = 1, the 2.5V ref is power on. (2.5V ref enable)
ASW3 VREF DATEN DAST/P67 CMPEN
VRSEL Function
x
x
x
x
1
1
1
x
1
x
x
x
0
1
1
x
x
x
x
1
0
1
x
x
select 2.5V ref, enable 2.5V ref, enable Comparator
select 2.5V ref, enable 2.5V ref, enable DAC,
enable buffer B2, buffer B2 output to CTCSS LPF
select 2.5V ref, enable 2.5V ref, enable DAC,
enable buffer B1, buffer B1 output to DAO/P67 pin
(4) Select DAO/P67 pin as normal I/O P67
Set DAST/P67 = 0 to select normal I/O P67.
(5) Using DAC general mode
1. DAT/DAD = 0
select DAC general mode
2. Program DA7 ~ DA0
3. Enable DAC, enable DAC output buffer, select DAC reference source
(6) Using DAC tone generator mode
1. DAT/DAD = 1
select DAC tone generator mode
2. Program DAT7 ~ DAT0 = 1 to 255. (If DAT7 ~ DAT0 = 0, DAC tone gen. is disabled.)
3. Enable DAC, enable DAC output buffer, select DAC reference source
Ps. When DAC tone output is set to CTCSS Sub-audio LPF(ASW3=DATEN=1 or VREF=DATEN=1), it will be
forced to select 2.5V ref by voltage reference control logic. When its output is set to DAO/P67 pin, reference
voltage can be selected as VDD or 2.5V.
Ref to Page 18,19 for CTCSS tone generation table.
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