參數(shù)資料
型號: ENC424J600T-I/ML
廠商: Microchip Technology
文件頁數(shù): 118/168頁
文件大?。?/td> 0K
描述: IC ETHERNET CTRLR W/SPI 44-QFN
視頻文件: Fast 100 Mbps Ethernet PICtail Plus Overview
標準包裝: 1,600
控制器類型: 以太網(wǎng)控制器(IEEE 802.3)
接口: SPI
電源電壓: 3 V ~ 3.6 V
電流 - 電源: 96mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 44-VQFN 裸露焊盤
供應商設(shè)備封裝: 44-QFN(8x8)
包裝: 帶卷 (TR)
配用: AC164132-ND - BOARD DAUGHTER PICTAIL ETHERNET
2007 Microchip Technology Inc.
DS21993C-page 51
PIC16CR7X
7.0
TIMER2 MODULE
Timer2 is an 8-bit timer with a prescaler and a
postscaler. It can be used as the PWM time base for the
PWM mode of the CCP module(s). The TMR2 register
is readable and writable, and is cleared on any device
Reset.
The input clock (FOSC/4) has a prescale option of 1:1,
1:4
or
1:16,
selected
by
control
bits
T2CKPS1:T2CKPS0 (T2CON<1:0>).
The Timer2 module has an 8-bit period register, PR2.
Timer2 increments from 00h until it matches PR2 and
then resets to 00h on the next increment cycle. PR2 is
a readable and writable register. The PR2 register is
initialized to FFh upon Reset.
The match output of TMR2 goes through a 4-bit
postscaler (which gives a 1:1 to 1:16 scaling inclusive)
to generate a TMR2 interrupt (latched in flag bit
TMR2IF, (PIR1<1>)).
Timer2 can be shut-off by clearing control bit TMR2ON
(T2CON<2>) to minimize power consumption.
Register 7-1 shows the Timer2 control register.
Additional information on timer modules is available in
the “PIC Mid-Range MCU Family Reference Manual”
(DS33023).
7.1
Timer2 Prescaler and Postscaler
The prescaler and postscaler counters are cleared
when any of the following occurs:
a write to the TMR2 register
a write to the T2CON register
any device Reset (POR, MCLR Reset, WDT
Reset or BOR)
TMR2 is not cleared when T2CON is written.
7.2
Output of TMR2
The output of TMR2 (before the postscaler) is fed to the
SSP module, which optionally uses it to generate shift
clock.
FIGURE 7-1:
TIMER2 BLOCK DIAGRAM
Comparator
TMR2
Sets Flag
TMR2 Reg
Output(1)
Reset
Postscaler
Prescaler
PR2 Reg
2
FOSC/4
1:1, 1:4, 1:16
EQ
4
bit TMR2IF
Note
1:
TMR2 register output can be software selected by
the SSP module as a baud clock.
1:1 to 1:16
T2OUTPS3:
T2OUTPS0
T2CKPS1:
T2CKPS0
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