參數(shù)資料
型號: EPM7032BLC44-3
廠商: Altera
文件頁數(shù): 3/66頁
文件大小: 0K
描述: IC MAX 7000 CPLD 32 44-PLCC
標準包裝: 130
系列: MAX® 7000B
可編程類型: 系統(tǒng)內可編程
最大延遲時間 tpd(1): 3.5ns
電壓電源 - 內部: 2.375 V ~ 2.625 V
邏輯元件/邏輯塊數(shù)目: 2
宏單元數(shù): 32
門數(shù): 600
輸入/輸出數(shù): 36
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 44-LCC(J 形引線)
供應商設備封裝: 44-PLCC(16.58x16.58)
包裝: 管件
Altera Corporation
11
MAX 7000B Programmable Logic Device Data Sheet
Figure 4. MAX 7000B Parallel Expanders
Unused product terms in a macrocell can be allocated to a neighboring macrocell.
Programmable Interconnect Array
Logic is routed between LABs on the PIA. This global bus is a
programmable path that connects any signal source to any destination on
the device. All MAX 7000B dedicated inputs, I/O pins, and macrocell
outputs feed the PIA, which makes the signals available throughout the
entire device. Only the signals required by each LAB are actually routed
from the PIA into the LAB. Figure 5 shows how the PIA signals are routed
into the LAB. An EEPROM cell controls one input to a two-input AND gate,
which selects a PIA signal to drive into the LAB.
Preset
Clock
Clear
Product-
Term
Select
Matrix
Preset
Clock
Clear
Product-
Term
Select
Matrix
Macrocell
Product-
Term Logic
From
Previous
Macrocell
To Next
Macrocell
Product-
Term Logic
36 Signals
from PIA
16 Shared
Expanders
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