參數(shù)資料
型號(hào): EPM7064AETI44-7N
廠商: Altera
文件頁(yè)數(shù): 22/64頁(yè)
文件大小: 0K
描述: IC MAX 7000 CPLD 64 44-TQFP
產(chǎn)品變化通告: Bond Wire Change 4/Sept/2008
標(biāo)準(zhǔn)包裝: 480
系列: MAX® 7000A
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時(shí)間 tpd(1): 7.5ns
電壓電源 - 內(nèi)部: 3 V ~ 3.6 V
邏輯元件/邏輯塊數(shù)目: 4
宏單元數(shù): 64
門(mén)數(shù): 1250
輸入/輸出數(shù): 36
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 44-TQFP
供應(yīng)商設(shè)備封裝: 44-TQFP(10x10)
包裝: 托盤(pán)
產(chǎn)品目錄頁(yè)面: 604 (CN2011-ZH PDF)
其它名稱: 544-2011
EPM7064AETI44-7N-ND
Altera Corporation
29
MAX 7000A Programmable Logic Device Data Sheet
Table 15. MAX 7000A Device DC Operating Conditions
Symbol
Parameter
Conditions
Min
Max
Unit
VIH
High-level input voltage
1.7
5.75
V
VIL
Low-level input voltage
–0.5
0.8
V
VOH
3.3-V high-level TTL output
voltage
IOH = –8 mA DC, VCCIO = 3.00 V (7)
2.4
V
3.3-V high-level CMOS output
voltage
IOH = –0.1 mA DC, VCCIO = 3.00 V
VCCIO – 0.2
V
2.5-V high-level output voltage IOH = –100 A DC, VCCIO = 2.30 V
2.1
V
IOH = –1 mA DC, VCCIO = 2.30 V (7)
2.0
V
IOH = –2 mA DC, VCCIO = 2.30 V (7)
1.7
V
VOL
3.3-V low-level TTL output
voltage
IOL = 8 mA DC, VCCIO = 3.00 V (8)
0.45
V
3.3-V low-level CMOS output
voltage
IOL = 0.1 mA DC, VCCIO = 3.00 V (8)
0.2
V
2.5-V low-level output voltage
IOL = 100 A DC, VCCIO = 2.30 V (8)
0.2
V
IOL = 1 mA DC, VCCIO = 2.30 V (8)
0.4
V
IOL = 2 mA DC, VCCIO = 2.30 V (8)
0.7
V
II
Input leakage current
VI = –0.5 to 5.5 V (9)
–10
10
A
IOZ
Tri-state output off-state
current
VI = –0.5 to 5.5 V (9)
–10
10
A
RISP
Value of I/O pin pull-up resistor
during in-system programming
or during power-up
VCCIO = 3.0 to 3.6 V (10)
20
50
k
VCCIO = 2.3 to 2.7 V (10)
30
80
k
VCCIO = 2.3 to 3.6 V (11)
20
74
k
Table 16. MAX 7000A Device Capacitance
Symbol
Parameter
Conditions
Min
Max
Unit
CIN
Input pin capacitance
VIN = 0 V, f = 1.0 MHz
8
pF
CI/O
I/O pin capacitance
VOUT = 0 V, f = 1.0 MHz
8
pF
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