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參數(shù)資料
| 型號(hào)： | EVAL-AD7719EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 11/40頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION FOR AD7719 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| ADC 的數(shù)量： | 2 |
| 位數(shù)： | 16，24 |
| 采樣率（每秒）： | 105 |
| 數(shù)據(jù)接口： | 串行 |
| 輸入范圍： | 2 Vpp |
| 在以下條件下的電源（標(biāo)準(zhǔn)）： | 4.85mW @ 105SPS |
| 工作溫度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD7719 |
| 已供物品： | 板 |
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REV. A
AD7719
–19–
CR7
CR6
CR5
CR4
CR3
CR2
CR1
CR0
WEN (0)
R/W (0)
0 (0)
A3 (0)
A2 (0)
A1 (0)
A0 (0)
Table IX. Communications Register Bit Designations
Bit
Location
Name
Description
CR7
WEN
Write Enable Bit. A 0 must be written to this bit so the write operation to the Communications register
actually takes place. If a 1 is written to this bit, the part will not clock on to subsequent bits in the register.
It will stay at this bit location until a 0 is written to this bit. Once a 0 is written to the
WEN bit, the next
seven bits will be loaded to the Communications register.
CR6
R/
W
A 0 in this bit location indicates that the next operation will be a write to a specified register. A 1 in this
position indicates that the next operation will be a read from the designated register.
CR5
Zero
A 0 must be written to this bit position to ensure correct operation of the AD7719.
CR4
Zero
A 0 must be written to this bit position to ensure correct operation of the AD7719.
CR3–CR0
A3–A0
Register Address Bits. These address bits are used to select which of the AD7719’s registers is being
accessed during this serial interface communication. A3 is the MSB of the three selection bits.
Communications Register (A3, A2, A1, A0 = 0, 0, 2, 0)
The Communications register is an 8-bit write-only register. All
communications to the part must start with a write operation to
the Communications register. The data written to the Commu-
nications register determines whether the next operation is a read
or write operation, and to which register this operation takes
place. For read or write operations, once the subsequent read or
write operation to the selected register is complete, the interface
returns to where it expects a write operation to the Communications
register. This is the default state of the interface, and on power-up
or after a RESET, the AD7719 is in this default state waiting for a
write operation to the Communications register. In situations where
the interface sequence is lost, a write operation of at least 32 serial
clock cycles with DIN high returns the AD7719 to this default
state by resetting the part. Table IX outlines the bit designations
for the Communications register. CR0 through CR7 indicate the
bit location, with CR denoting that the bits are in the Commu-
nications register. CR7 denotes the first bit of the data stream.
Table X. Register Selection Table
A3
A2
A1
A0
Register
0000Communications Register during a Write Operation
0000
Status Register during a Read Operation
0001Mode Register
0010Main ADC Control Register (AD0CON)
0011Aux ADC Control Register (AD1CON)
0100Filter Register
0101Main ADC Data Register
0110Aux ADC Data Register
0111I/O Control Register
1000Main ADC Offset Calibration Register
1001Aux ADC Offset Calibration Register
1010Main ADC Gain Calibration Register
1011Aux ADC Gain Calibration Register
1100Test 1 Register
1101Test 2 Register
1110Undefined
1111ID Register
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