2C COMPATIBLE INTERFACE TIMING t
參數(shù)資料
型號: EVAL-ADUC812QSZ
廠商: Analog Devices Inc
文件頁數(shù): 47/57頁
文件大?。?/td> 0K
描述: BOARD EVALUATION FOR ADUC812
產(chǎn)品培訓模塊: Process Control
標準包裝: 1
系列: QuickStart™ 套件
類型: MCU
適用于相關產(chǎn)品: ADuC812
所含物品: 評估板、電源、纜線、軟件和說明文檔
REV.
–51–
ADuC812
Parameter
Min
Max
Unit
I
2C COMPATIBLE INTERFACE TIMING
tLOW
SCLOCK Low Pulsewidth
1.3
μs
tHIGH
SCLOCK High Pulsewidth
0.6
μs
tHD; STA
Start Condition Hold Time
0.6
μs
tSU; DAT
Data Setup Time
100
μs
tHD; DAT
Data Hold time
0
0.9
μs
tSU; STA
Setup time for Repeated Start
0.6
μs
tSU; STO
Stop Condition Setup Time
0.6
μs
tBUF
Bus Free Time between a STOP
Condition and a START Condition
1.3
μs
tR
Rise Time for Both SCLOCK and SDATA
300
ns
tF
Fall Time for Both SCLOCK and SDATA
300
ns
tSUP
1
Pulsewidth of Spike Suppressed
50
ns
SDATA (I/O)
SCLK (I)
STOP
CONDITION
START
CONDITION
PS
REPEATED
START
S(R)
1
2–7
8
1
MSB
tBUF
tSUP
tR
tF
LSB
ACK
MSB
t
SU; STO
t
HD; STA
t
HD; STA
t
HD; DAT
t
LOW
t
HIGH
t
SU; DAT
t
SU; STA
9
t
HD; DAT
Figure 55. I2C Compatible Interface Timing
F
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