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參數(shù)資料
| 型號(hào)： | FW802 |
| 英文描述： | Low-Power PHY IEEE 1394A-2000 Two-Cable Transceiver/Arbiter Device |
| 中文描述： | 低功耗PHY的IEEE 1394A端口- 2000兩線收發(fā)器/仲裁器裝置 |
| 文件頁數(shù)： | 3/36頁 |
| 文件大小： | 461K |
| 代理商： | FW802 |
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Intel
80200 Processor based on Intel
XScale
Microarchitecture
Datasheet
August 2002
3
Contents
1.0
About this Document..........................................................................................................5
2.0
Functional Overview...........................................................................................................5
2.1
Superpipeline ........................................................................................................7
2.2
Branch Target Buffer (BTB)...................................................................................8
2.3
Instruction Memory Management Unit (IMMU) .....................................................8
2.4
Data Memory Management Unit (DMMU).............................................................9
2.5
Instruction Cache (I-Cache) ..................................................................................9
2.6
Data Cache (D-Cache)........................................................................................10
2.7
Mini-Data Cache..................................................................................................10
2.8
Fill Buffer (FB) and Pend Buffer (PB)..................................................................11
2.9
Write Buffer (WB) ................................................................................................11
2.10
Multiply-Accumulate Coprocessor (CP0) ............................................................11
2.11
Clock and Power Management...........................................................................12
2.12
Performance Monitoring Unit (PMU) ...................................................................12
2.13
Debug Unit ..........................................................................................................12
3.0
Package Information ........................................................................................................13
3.1
Package Introduction...........................................................................................13
3.1.1
Functional Signal Definitions..................................................................13
3.1.1.1 Signal Pin Descriptions .............................................................13
3.1.2
241 Lead PBGA Package ......................................................................17
3.2
Package Thermal Specifications.........................................................................22
3.3
Package Thermal Resistance .............................................................................22
4.0
Electrical Specifications....................................................................................................24
4.1
Absolute Maximum Ratings.................................................................................24
4.2
V
CCA
Pin Requirements ......................................................................................25
4.3
Targeted DC Specifications.................................................................................26
4.4
Targeted AC Specifications.................................................................................27
4.4.1
Clock Signal Timings..............................................................................27
4.4.2
Bus Signal Timings.................................................................................28
4.4.3
Boundary Scan Test Signal Timings ......................................................29
4.5
AC Timing Waveforms ........................................................................................30
4.6
Power Sequence.................................................................................................32
4.7
Reset Timing .......................................................................................................34
4.8
AC Test Conditions .............................................................................................34
4.9
Typical Power Dissipation ...................................................................................35
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| FW802A | Low-Power PHY IEEE 1394A-2000 Two-Cable Transceiver/Arbiter Device |
| FW802A-DB | Low-Power PHY IEEE 1394A-2000 Two-Cable Transceiver/Arbiter Device |
| FW802C | FW 802C LOW - POWER IEEE 1394A-2000 TWO CABLE TRANSCEIVER/ ARBITER DEVICE |
| FW802C-DB | FW 802C LOW - POWER IEEE 1394A-2000 TWO CABLE TRANSCEIVER/ ARBITER DEVICE |
| FW803-09-DB | PHY IEEE 1394A Three-Cable Transceiver/Arbiter Device |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FW80200M400 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor |
| FW80200M400SL676 | 功能描述:IC I/O PROCESSOR 400MHZ 241-BGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:- 標(biāo)準(zhǔn)包裝:2 系列:MPC8xx 處理器類型:32-位 MPC8xx PowerQUICC 特點(diǎn):- 速度:133MHz 電壓:3.3V 安裝類型:表面貼裝 封裝/外殼:357-BBGA 供應(yīng)商設(shè)備封裝:357-PBGA（25x25） 包裝:托盤 |
| FW80200M600 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor |
| FW80200M600 S L677 | 制造商:Intel 功能描述:MPU 80200 Processor 32-Bit 0.18um 600MHz 241-Pin BGA |
| FW80200M600 SL677 | 制造商:Intel 功能描述: |
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