參數(shù)資料
型號: GS840E18GB-180
廠商: GSI TECHNOLOGY
元件分類: SRAM
英文描述: 256K X 18 CACHE SRAM, 8 ns, PBGA119
封裝: BGA-119
文件頁數(shù): 25/31頁
文件大?。?/td> 629K
代理商: GS840E18GB-180
Rev: 2.05 6/2000
31/31
1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com
.
GS840E18/32/36T/B-180/166/150/100
Revision History
Rev. Code: Old;
New
Types of Changes
Format or Content
Page /Revisions;Reason
GS840E18/32/36 Rev 1.02c 5/
1999;
GS840E18/32/36 2.00 8/1999D
Format/Typos
Document/Continued changing to new format.
Content
Added Fine Pitch BGA Package.
GS840E18/32/362.00 8/
1999;GS840E18/32/362.01 9/
1999E
Format/Typos
Took “E” out of 840HE...in Core and Interface Voltages.
Pin outs/New small caps format.
Timing Diagrams/New format.
Block Diagrams/New small caps format.
Content
Pin outs/x32 & x36 TQFP/Changed pin 72 from DQA3 to DQB3.
Pin Description/Rearranged Address Inputs to match order on TQFP Pinout.
TQFP Package Diagram/Corrected Dimension D Max from 20.1 to 22.1.
GS840E18/32/362.01 9/
1999E;GS840E18/32/362.02
Took out Fine Pitch BGA Package. Package change in progress.
GS840E18/32/362.0210-11/
1999;GS840E18/32/362.032/
2000G
Format
New GSI Logo
Took “Pin” out of heading for consistency.
GS840E18/32/362.032/2000G;
840E18_r2_04
Content
Updated pin description table
840E18_r2_04; 840E18_r2_05
Content
Updated BGA pin description table to meet JEDEC standard
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