參數(shù)資料
型號： GS9023ACFY
廠商： Gennum Corporation
元件分類： Codec
英文描述： GENLINX -TM II GS9023A Embedded Audio CODEC
中文描述： GENLINX -商標(biāo)二GS9023A嵌入式音頻編解碼器
文件頁數(shù)： 26/37頁
文件大小： 318K
代理商： GS9023ACFY
26 of 37
G
GENNUM CORPORATION
19795 - 6
3. HOST INTERFACE TABLES
3.1 MULTIPLEX MODE
TABLE 14 MULTIPLEX MODE HOST INTERFACE REGISTERS
ADDRESS
BIT
NAME
FUNCTION
R/W
DEFAULT
0h
2-0
VMOD[2:0]
Video standard selection.
See Table 1. Valid when “VSEL” is HIGH. Used in
conjunction with “D2_TRS”. “VMOD[2]” is the MSB and “VMOD[0]” is the
LSB.
R/W
0
3
LOCK
Lock indicator. Same functionality as the LOCK pin. When set HIGH, the
video standard has been identified, the start of a new video frame has been
detected and the device is ready to multiplex audio.
NOTE: LOCK will not be set HIGH unless at least one of the “CHACT(4-1)”
bits (Address #1h) is HIGH.
R
0
4
EDHDEL
EDH data delete. When set LOW, existing EDH packets are removed from the
video stream. When set HIGH, existing EDH packets are passed through
unless overwritten via the EDH_INS pin or the “EDHON” bit. Valid only when
“CASCADE” (Address #4h bit 7) is LOW.
R/W
0
5
RSV
Not used.
–
–
6
D2_TRS
TRS select. Same functionality as the TRS pin. Used to select video standard
format.When set HIGH, TRS is added to a composite video signal. Valid only
when “VSEL” is HIGH. Used in conjunction with “VMOD[2:0]”.
R/W
0
7
VSEL
Video input format (external pin/internal register) configuration select. When
set LOW, the video input format is configured via the VM[2:0] and TRS pins.
When set HIGH, the video input format is configured via the “VMOD[2:0]” and
“D2_TRS” bits.
R/W
0
1h
3-0
CHACT(4-1)
Audio channel enable. When set HIGH, the corresponding audio channel is
multiplexed into the video signal. “CHACT(4)” is the MSB and “CHACT(1)” is
the LSB. When set LOW, the GS9023A will not insert audio packets.
NOTE: Do not rely on default value. Reprogram on power up or reset.
R/W
Fh
4
ACON
Audio Control packet enable. When HIGH, the audio control packet is
multiplexed in the video signal.
R/W
0
5
EDHON
EDH packet enable. Same functionality as the EDH_INS pin. When set HIGH,
the GS9023A performs EDH functions according to SMPTE RP165.
NOTE: Active picture and full field data words are updated from recalculated
values but error flag information is replaced with the values programmed in
Host Interface Registers #Eh and #Fh.
R/W
0
6
A4ON
Extended audio packet enable. Same functionality as the AUXEN pin. When
set HIGH, the extended audio packet is multiplexed in the video signal (24 bit
audio).
R/W
0
7
PKON
Arbitrary data packet enable. When set HIGH, an arbitrary data packet is
multiplexed in the video signal.
R/W
0
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參數(shù)描述
GS9023ACFYE3 制造商:Semtech Corporation 功能描述:Audio Codec 4ADC / 4DAC 24-Bit 100-Pin LQFP
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GS9023-CFY 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Embedded Audio CODEC
GS9024 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Automatic Cable Equalizer
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