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參數(shù)資料
| 型號： | GS9023ACFY |
| 廠商： | Gennum Corporation |
| 元件分類： | Codec |
| 英文描述： | GENLINX -TM II GS9023A Embedded Audio CODEC |
| 中文描述： | GENLINX -商標(biāo)二GS9023A嵌入式音頻編解碼器 |
| 文件頁數(shù)： | 29/37頁 |
| 文件大小： | 318K |
| 代理商： | GS9023ACFY |
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G
GENNUM CORPORATION
19795 - 6
3.2 DEMULTIPLEX MODE
TABLE 15 DEMULTIPLEX MODE HOST INTERFACE REGISTERS
ADDRESS
BIT
NAME
FUNCTION
R/W
DEFAULT
0h
2-0
VMOD[2:0]
Video standard selection. See Table 1. Valid when “VSEL” is HIGH.
Used in conjunction with “D2_TRS”. “VMOD[2]” is the MSB and
“VMOD[0]” is the LSB.
R/W
0
3
LOCK
Lock indicator. Same functionality as the LOCK pin. When set HIGH,
the video standard has been identified, the ‘lock’ process selected by
“ACTSEL” has been validated and the device is ready to demultiplex
audio.
See “ACTSEL” description
.
R
0
4
ADEL
Ancillary data delete. Same functionality as the ANCI pin. When set
HIGH, each ancillary data packet with a DID corresponding to either
the audio packet DID, the extended audio packet DID or the arbitrary
packet DID is removed from the video signal. When the “ADEL” bit is
LOW, all ancillary data packets remain in the video signal. Valid only
when “VSEL” is HIGH.
R/W
0
5
RSV
Not used.
–
–
6
D2_TRS
TRS select. Same functionality as the TRS pin. Used to select video
standard format. When set HIGH, TRS is removed from a composite
video signal. Valid only when “VSEL” is HIGH. Used in conjunction with
“VMOD[2:0]”.
R/W
0
7
VSEL
Video input format (external pin/internal register) configuration select.
When set LOW, the video input format is configured via the VM[2:0]
and TRS pins. When set HIGH, the video input format is configured via
the “VMOD[2:0]” and “D2_TRS” bits.
R/W
0
1h
3-0
CHACT(4-1)
Active audio channel flags. When set HIGH, the corresponding audio
packets have been detected on the active video line. When set LOW,
no corresponding audio packets have been detected on the active
video line. The flags are updated on every frame.
NOTE: When multiple audio groups are embedded in a video signal,
the GS9023A will only indicate the presence of the first audio group.
All audio groups will be properly demultiplexed, but the indicators for
multiple groups will not be set correctly.
R
0
4
ACON
Audio Control packet flag. When set HIGH, the audio control packet
has been detected in the video signal.
R
0
5
EDHON
EDH flag. When set HIGH, EDH data has been detected in the video
signal.
R
0
6
A4ON
Extended audio packet flag. When set HIGH, the extended audio
packet has been detected on the active video line (24 bit audio).
When set LOW, no extended audio packet has been detected on the
active video line (24 bit audio).
R
0
7
RSV
Not used.
-
2h
0
REVISION
Device revision. When set HIGH, indicates the device is a GS9023A
revision.
R
1
1
RSV
Not used.
-
2
VDET_MODE
Video detect mode. When set HIGH, the GS9023A will check the
interval between the TRS on every line. If the interval is not consistent,
the GS9023A assumes the input video has been switched and the
internal audio sample buffer will be reset. Valid only when "RSEL" is set
HIGH.
R/W
0
3
RSV
Not used.
-
4
RSV
Not used.
-
5
RSV
Not used.
-
6
RSV
Not used.
-
7
RSEL
Register select. When set HIGH, bit 2 of Host Interface register
address #2h is valid.
R/W
0
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相關(guān)代理商/技術(shù)參數(shù) |
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| GS9023ACFYE3 | 制造商:Semtech Corporation 功能描述:Audio Codec 4ADC / 4DAC 24-Bit 100-Pin LQFP |
| GS9023B | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:Embedded Audio CODEC |
| GS9023BCVE3 | 功能描述:IC AUDIO CODEC 100PIN TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):81.5 / 88 動態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR) |
| GS9023-CFY | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Embedded Audio CODEC |
| GS9024 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Automatic Cable Equalizer |
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