參數(shù)資料
型號： GS9023ACFY
廠商： Gennum Corporation
元件分類： Codec
英文描述： GENLINX -TM II GS9023A Embedded Audio CODEC
中文描述： GENLINX -商標(biāo)二GS9023A嵌入式音頻編解碼器
文件頁數(shù)： 27/37頁
文件大?。?/td> 318K
代理商： GS9023ACFY
27 of 37
G
GENNUM CORPORATION
19795 - 6
2h
0
REVISION
Device revision. When set HIGH, indicates the device is a GS9023A revision.
R
1
1
BUFSTAT
Internal buffer status. When set HIGH, indicates that the internal audio
sample buffer is in an overflow/underflow condition.
R
0
2
VDET_MODE
Video detect mode. When set HIGH, the GS9023A will check the interval
between the TRS on every line. If the interval is not consistent, the GS9023A
assumes the input video has been switched and the internal audio sample
buffer will be reset. Valid only when "RSEL" is set HIGH.
R/W
0
3
8BIT_SEL
8-bit input selection. When set HIGH, the GS9023A will accept an 8-bit video
input where DIN[9] is the MSB and DIN[2] is the LSB. DIN[1:0] should be set
LOW. Valid only when "RSEL" is set HIGH.
R/W
0
4
RSV
Not used.
-
5
MUTE_A/M
Mute on buffer error mode. When set LOW, the GS9023A will automatically
set the embedded audio packets to zero (MUTE) when BUFSTAT is HIGH.
When set HIGH, the user is required to set the MUTE function on detection of
BUFSTAT set HIGH. Valid only when "RSEL" is set HIGH.
It is recommended that this bit is kept HIGH whenever the video input to the
device may undergo a synchronous switch (see Section 2.1.2.1).
R/W
0
6
BUFCTRL
Internal buffer control mode. When set HIGH, the GS9023A will automatically
reset the internal audio sample buffer when an overflow/underflow condition
is detected. When set LOW, the internal audio sample buffer will not be reset
unless the user asserts a device RESET. Valid only when "RSEL" is set HIGH.
It is recommended that this bit is kept HIGH whenever the video input to the
device may undergo a synchronous switch (see Section 2.1.2.1).
R/W
0
7
RSEL
Register select. When set HIGH, bits 2-6 of Host Interface register address
#2h are valid.
R/W
0
3h
3-0
AD20ID[3:0]
Designates the 4 LSBs of the audio data packet DID word. The 6 MSBs are
internally generated. “AD20ID[3]” is the MSB and “AD20ID[0]” is the LSB.
R/W
Fh
7-4
AD4ID[3:0]
Designates the 4 LSBs of the extended audio data packet DID word. The 6
MSBs are internally generated. “AD4ID[3]” is the MSB and “AD4ID[0]” is the
LSB.
R/W
Eh
4h
3-0
ACID[3:0]
Designates the 4 LSBs of the audio control packet DID word. The 6 MSBs are
internally generated. “ACID[3]” is the MSB and “ACID[0]” is the LSB.
R/W
Fh
4
RSV
Not used.
-
5
MUTE
Audio mute enable. Same functionality as the MUTE pin. When set HIGH, the
multiplexed audio and extended data packets are forced to zero.
R/W
0
6
AC34/12
Audio control packet channel pair select. When set HIGH, audio control
packet delay data for audio channels 3 and 4 is captured in registers Ah, Bh,
Ch and Dh. When set LOW, audio control packet delay data for audio
channels 1 and 2 is captured in registers #Ah, #Bh, #Ch and #Dh.
R/W
0
7
CASCADE
Cascade select. When set HIGH, the GS9023A device is part of a cascaded
architecture. New packets are multiplexed into the video signal starting at the
first free location of the HANC space if there is sufficient remaining space to
insert the packet. When set LOW, new packets are multiplexed into the video
signal starting after EAV. Existing ancillary data packets are overwritten and
the remaining ancillary space is cleared.
R/W
0
5h
7-0
PKTID[7:0]
Designates the 8 LSBs of the arbitrary data packet DID word. The 2 MSBs
are internally generated. “PKTID[7]” is the MSB and “PKTID[0]” is the LSB.
R/W
0
6h
1-0
BUFSEL[1:0]
Video/audio delay mode. “BUFSEL[1]” is the MSB and “BUFSEL[0]” is the
LSB. See Table 13.
R/W
1h
7-2
RSV
Not used.
-
7h
0
ADERR
Audio data packet multiplexing error. The packet will not be multiplexed
because of insufficient room in the HANC space. Error is cleared when read.
R
0
1
ACERR
Audio control packet multiplexing error. The packet will not be multiplexed
because of insufficient room in the HANC space. Error is cleared when read.
R
0
7-2
RSV
Not used.
-
TABLE 14 MULTIPLEX MODE HOST INTERFACE REGISTERS (CONTINUED)
ADDRESS
BIT
NAME
FUNCTION
R/W
DEFAULT
相關(guān)PDF資料
PDF描述
GS9023 Embedded Audio CODEC
GS9023-CFY Aluminum Electrolytic Radial Leaded Bi-Polar Capacitor; Capacitance: 100uF; Voltage: 63V; Case Size: 12.5x20 mm; Packaging: Bulk
GS9024 Automatic Cable Equalizer
GS9024-CKB Automatic Cable Equalizer
GS9024-CTB Automatic Cable Equalizer
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GS9023ACFYE3 制造商:Semtech Corporation 功能描述:Audio Codec 4ADC / 4DAC 24-Bit 100-Pin LQFP
GS9023B 制造商:GENNUM 制造商全稱:GENNUM 功能描述:Embedded Audio CODEC
GS9023BCVE3 功能描述:IC AUDIO CODEC 100PIN TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):81.5 / 88 動態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR)
GS9023-CFY 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Embedded Audio CODEC
GS9024 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Automatic Cable Equalizer
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*