參數(shù)資料
型號： GT-48006A
廠商： Galileo Technology Services, LLC
英文描述： Low Cost Two Port 10/100Mbps Ethernet Bridge/Switch Controller(低成本、雙端口10/100Mbps以太網(wǎng)橋式/交換式控制器)
中文描述： 低成本雙口10/100Mbps以太網(wǎng)橋/開關(guān)控制器（低成本，雙端口10/100以太網(wǎng)橋式/交換式控制器）
文件頁數(shù)： 29/33頁
文件大?。?/td> 352K
代理商： GT-48006A
GT-48006A Low Cost Two Port 10/100 Ethernet Bridge/Switch Controller
5
RxEr[1:0]
I
Receive Error. Active HIGH. Indicates that an error was detected in the
received frame. This input is ignored when RxDV for the same port is inactive.
RxClK[1:0]
I
Receive Clock. Provides the timing reference for the transfer of the RxDV,
RxD, RxEr signals (per port). Operates at either 25 MHz (100Mbps) or 2.5
MHz (10Mbps). The nominal frequency of RxClk (per port) should match the
nominal frequency of that port’s TxClk.
RxDV[1:0]
I
Receive Data Valid: Active HIGH. Indicates that valid data is present on the
RxD lines. Synchronous to RxClk.
CrS[1:0]
I
Carrier Sense: Active HIGH. Indicates that either the transmit or receive
medium is non-idle. CrS is not synchronous to any clock.
MDC
O
Management Data Clock: Provides the timing reference for the transfer of the
MDIO signal. This output may be connected to the PHY devices of both ports.
MDIO
I/O
Management Data Input/Output: This bidirectional line is used to transfer
control information and status between the PHY and the GT-48006A. It con-
forms with IEEE Std 802.3u. This signal may be connected to the PHY devices
of both ports. When not in use this pin must be connected to a pull-down resis-
tor.
Miscellaneous Interface Pins
LEDData
I/O
LED Data/DisBufThr: In normal configuration carries the serial data bit stream
which contains the LED indicators per port. The data is shifted out using the
LEDClk. LEDStb is used to mark the first data bit. This pin is active low. During
reset, this pin is sampled by the GT-48006A for dynamic/fixed buffering alloca-
tion.
LEDStb
I/O
LED Strobe/Force Link Pass: In normal operation indicates the beginning
(data bit #1) of a valid data frame on LEDData output - active High. During
reset, this pin is sampled by the GT-48006A to Force the link to pass.
LEDClk
O
LED Clock: 1 MHz clock. This output is used to clock the LEDStb and LED-
Data outputs. During RESET, LEDClk frequency is 40 MHz.
Scan*
I
Scan: This pin together with TriState* indicate the GT-48006A mode of opera-
tion as follows:
Factory test modes are reserved and are not to be used in-system. Failure to
observe this restriction could result in damage to the device.
TriState*
I
Tri State: This pin together with Scan* indicate the GT-48006A mode of oper-
ation as described above.
Sy m b ol
Ty p e
De s c ri pti o n
Sc an*
Tr i S t a t e *
Mode
1
Normal operation
0
1
Factory test mode (reserved)
1
0
The GT-48006A drives all out-
puts and I/O pins to high imped-
ance.
0
Factory test mode (reserved)
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