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參數(shù)資料
| 型號： | GT-48006A |
| 廠商： | Galileo Technology Services, LLC |
| 英文描述： | Low Cost Two Port 10/100Mbps Ethernet Bridge/Switch Controller(低成本、雙端口10/100Mbps以太網(wǎng)橋式/交換式控制器) |
| 中文描述： | 低成本雙口10/100Mbps以太網(wǎng)橋/開關(guān)控制器（低成本，雙端口10/100以太網(wǎng)橋式/交換式控制器） |
| 文件頁數(shù)： | 7/33頁 |
| 文件大?。?/td> | 352K |
| 代理商： | GT-48006A |
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GT-48006A Low Cost Two Port 10/100 Ethernet Bridge/Switch Controller
15
MDC/MDIO interface:
1.
Read the PHY Auto-Negotiation Complete status. As long as PHY bit 1.5 (Register 1, bit 5) is '0' switch to Half-
Duplex mode and continue to read PHY register bit 1.5. Continue to step 2 when PHY bit 1.5 is '1', signaling Auto-
negotiation is complete.
Steps 2 through 6 are performed once for every transition of PHY bit 1.5 from '0' to '1'. Once PHY bit 1.5 remains '1'
and PHY registers 4 and 5 have already been read, the GT-48006A will continue to read PHY register 1, and monitor
PHY bit 1.5. Steps 2 to 6 are performed once, if after Rst* de-assertion, the PHY bit 1.5 is read as '1', in order to update
the GT-48006A duplex mode.
NOTE: PHY bit 1.2 (Link Status) is read and latched during this same register read operation, regardless of the Auto-
Negotiation status.
2.
Read the Auto-Negotiation Advertisement register, PHY Register 4. Continue to step 3.
3.
Read the Auto-Negotiation Link Partner Ability register, PHY Register 5. Continue to step 4.
4.
Resolve the highest common ability of the two link partners in the following manner (according to the 802.3u Prior-
ity Resolution clause 28B.3):
if (bit 4.8 AND bit 5.8) == '1' then ability is 100BASE-TX Full Duplex
else if (bit 4.9 AND bit 5.9) == '1' then ability is 100BASE-T4 Half Duplex
else if (bit 4.7 AND bit 5.7) == '1' then ability is 100BASE-TX Half Duplex
else if (bit 4.6 AND bit 5.6) == '1' then ability is 10BASE-T Full Duplex
else ability is 10BASE-T Half Duplex;
Continue to step 5.
5.
Resolve the duplex mode of the two link partners in the following manner:
if ( (ability == "100BASE-TX Full Duplex") or (ability == "10BASE-T Full Duplex") ) then
duplex mode = FULL DUPLEX
else duplex mode = HALF DUPLEX;
NOTE: the value of the duplex mode indication should change only after reading both PHY registers 4 and 5. Continue
to step 6.
6.
Update the GT-48006A MAC. Continue with step 1.
9.4
Backoff Algorithm Options
The GT-48006A implements the truncated exponential backoff algorithm defined by the 802.3 standard. Aggressive-
ness of the backoff algorithm used by all of the ports is controlled by the Limit4 pin. Limit4 controls the number of con-
secutive packet collisions that will occur before the consecutive collision counter is reset. When Limit4 is LOW, the GT-
48006A resets the collision counter after 16 consecutive retransmit trials, restarts the backoff algorithm, and continues
to try and retransmit the frame. A packet which is endlessly colliding on re-transmits will continue to be re-transmitted
forever, only changing backoff intervals. The retransmission is done from the data already stored in the DRAM. In the
case of a successful transmission, the GT-48006A is ready to transmit any other frames queued in its transmit FIFO
within the minimum IPG of the link.
When Limit4 is HIGH, the GT-48006A will reset its collision counter and restarts the backoff algorithm after 4 consecu-
tive transmit trials. This results in the GT-48006A being more aggressive in acquiring the media following a collision.
This will result in better overall switch throughput (less packet loss) in standardized tests. Limit4 can be toggled during
switch operation.
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