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| 型號： | GT28F320D18B110 |
| 英文描述： | x16 Flash EEPROM |
| 中文描述： | x16閃存EEPROM |
| 文件頁數： | 51/83頁 |
| 文件大小： | 836K |
| 代理商： | GT28F320D18B110 |
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28F320D18
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47
reads. Burst reads are limited to within a partition, it is not possible to do a burst read across the
partition boundary. A block diagram showing signal connections is shown in
Figure 18
. This is an
ideal interface, and some glue logic may be required if the processor does not provide any or all of
these signals.
Figure 19
shows a synchronous burst mode read timing diagram. Note that only one
address is needed from the processor to generate four valid data outputs.
Figure 18. Synchronous Burst Read Interface Block Diagram
Figure 19. Synchronous Burst Mode Read Waveform
Burst CPU
1.8 Volt
Dual-Plane
Flash Memory
Address
CE#
OE#
WE#
Data
ADV#
CE#
OE#
WE#
CLK
Reset
A
20-0
DQ
15-0
RST#
CLK
A
20-0
V
IH
V
IL
V
IH
V
IL
Valid
Address
Note 1
ADV#
CE#
OE#
WE#
DQ
15-0
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
Valid
Output
Valid
Output
Valid
Output
Valid
Output
ADV# transition informs the device to latch a new
address and start a new burst cycle
Data held valid for one clock cycle
NOTE:
1. Clock cycles are insterted based on the frequency configuration code:
Frequency Configuration 2: insert two clock cycles.
é
Frequency Configuration 3: insert three clock cycles.
é
Frequency Configuration 4: insert four clock cycles.
é
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PDF描述 |
|---|---|
| GT28F320D18B120 | x16 Flash EEPROM |
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| GT3TK-36DP-DSA | Antenna, Sensor, and Communications Trunk Line Connections |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| GT28F320D18B120 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 Flash EEPROM |
| GT28F320S3-100 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:WORD-WIDE FlashFile⑩ MEMORY FAMILY |
| GT28F320S3-120 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:WORD-WIDE FlashFile MEMORY FAMILY |
| GT28F320W18BC60 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel? Wireless Flash Memory |
| GT28F320W18BC80 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel? Wireless Flash Memory |
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