參數(shù)資料
型號： HCS12COREUG
廠商： Motorola, Inc.
英文描述： MC9S12DT128B
中文描述： MC9S12DT128B
文件頁數(shù)： 2/124頁
文件大?。?/td> 577K
代理商： HCS12COREUG
Motorola reserves the right to make changes without further notice to any products herein to improve reliability, function or
design. Motorola does not assume any liability arising out of the application or use of any product or circuit described herein;
neither does it convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to
support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where
personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized
application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless
against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of
personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was
negligent regarding the design or manufacture of the part.
DOCUMENT NUMBER
9S12DT128BDGV1/D
2
Revision History
Version
Number
Revision
Date
18 Jun
2001
23 July
2001
Effective
Date
18 June
2001
23 July
2001
Author
Description of Changes
V01.00
Initial version (parent doc v2.03 dug for dp256).
V01.01
Updated version after review
V01.02
23 Sep
2001
23 Sep
2001
Changed Partname, added pierce mode, updated electrical
characteristics
some minor corrections
V01.03
12 Oct
2001
12 Oct
2001
Replaced Star12 by HCS12
V01.04
27 Feb
2002
27 Feb
2002
Updated electrical spec after MC-Qualification (IOL/IOH), Data for
Pierce, NVM reliability
New document numbering. Corrected Typos
Increased VDD to 2.35V, removed min. oscillator startup
Removed Document order number except from Cover Sheet
Added:
Pull-up columns to signal table,
example for PLL Filter calculation,
Thermal values for junction to board and package,
BGND pin pull-up
Part Order Information
Global Register Table
Chip Configuration Summary
Modified:
Reduced Wait and Run IDD values
Mode of Operation chapter
changed leakage current for ADC inputs down to +-1uA
Corrected:
Interrupt vector table enable register inconsistencies
PCB layout for 80QFP VREGEN position
V01.05
4 Mar
2002
4 Mar
2002
V01.06
8 July
2002
22 July
2002
V01.07
16 Aug
2002
16 Aug
2002
Minor corrections in table 1-1 & section 1.5.1
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