參數(shù)資料
型號(hào): HCS12COREUG
廠商: Motorola, Inc.
英文描述: MC9S12DT128B
中文描述: MC9S12DT128B
文件頁數(shù): 99/124頁
文件大小: 577K
代理商: HCS12COREUG
MC9S12DT128B Device User Guide — V01.07
99
A.3.2 NVM Reliability
The reliability of the NVM blocks is guaranteed by stress test during qualification, constant process
monitors and burn-in to screen early life failures.
The failure rates for data retention and program/erase cycling are specified at the operating conditions
noted.
The program/erase cycle count on the sector is incremented every time a sector or mass erase event is
executed.
NOTE:
All values shown in
Table A-12
are target values and subject to further extensive
characterization
Table A-12 NVM Reliability Characteristics
Conditions are shown in
Table A-4
unless otherwise noted
NOTE:
Flash cycling performance is 10 cycles at -40C to +125C. Data retention is
specified for 15 years.
NOTE:
EEPROM cycling performance is 10K cycles at -40C to 125C. Data retention is
specified for 5 years on words after cycling 10K times. However if only 10 cycles
are executed on a word the data retention is specified for 15 years.
4. Burst Programming operations are not applicable to EEPROM
5. Minimum Erase times are achieved under maximum NVM operating frequency f
NVMOP
.
6. Minimum time, if first word in the array is not blank
7. Maximum time to complete check on an erased block
Num C
Rating
Cycles
Data Retention
Lifetime
Unit
1
C Flash/EEPROM (-40C to +125C)
10
15
Years
2
C EEPROM (-40C to +125C)
10,000
5
Years
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