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參數(shù)資料
| 型號(hào)： | HD49335F |
| 廠商： | Renesas Technology Corp. |
| 英文描述： | CDS/PGA AND 10-bit A/D TG Converter |
| 中文描述： | 的CDS / PGA和10位A / D轉(zhuǎn)換器熱 |
| 文件頁數(shù)： | 22/30頁 |
| 文件大?。?/td> | 323K |
| 代理商： | HD49335F |
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HD49335F/HF
Rev.1.0, Feb.25.2004, page 22 of 29
Address H’F5 sets the DLL delay time and selects the 1/4 phase. Details are on the next page. And D15 of address
H’F8 can switch 2/3 divided mode but ensure that this address data relative to valid/invalid.
D15 of address H’F8 = 0
Divided mode
2 divided, 1/4 phase select
D0 to D7 of address H’F5
Valid
D0 to D14 of address H’F8
Invalid
Phase settings of high speed pulse (address H’F5 to H’F8)
(1) Select the 1/4 phase from figure 13 at 2 divided mode (D15 = 0 of address H’F8).
Select the 1/6 phase from figure 14 at 3 divided mode (D15 = 1 of address H’F8).
·····P_SP1, P_SP2, P_ADCLK, P_RG
(2) Then select the necessary delay time from figure 15.
·····DL_SP1, DL_SP2, DL_RG, DL_ADCLK
RG can be set both of rising / falling edge optionally.
D15 of address H’F8 = 1
3 divided, 1/6 phase select
Invalid
Valid
H1
Data = 0
Data = 1
Data = 3
Data = 2
P_SP1
P_SP2
H1
Data = 0
Data = 1
Data = 3
Data = 2
P_ADCLK
P_RG
Figure 13 2 Divided Mode, 1/4 Phase Select
(Valid at D15 = 0 of address H’F8)
H1
Data = 5
Data = 2
Data = 3
Data = 4
Data = 1
Data = 0
P_SP1
P_SP2
H1
Data = 0
Data = 3
Data = 4
Data = 5
Data = 2
Data = 1
P_ADCLK
P_RG
Figure 14 3 Divided Mode, 1/6 Phase Select
(Valid at D15 = 1 of address H’F8)
Default Value of Each Phases
2 divided mode
3 divided mode
Note: 50% of duty pulse makes tr, tf of RG by DLL.
P_SP1
1
0
P_SP2
2
3
P_ADCLK
1
1
P_RG
0
5
Address
STD1[7:0] (L)
STD2[15:8] (H)
1
1
1
1
0
1
1
0
D4
D3
D2
D7
D6
D5
D1
D0
D12 D11 D10 D9
D8
DL_SP2
DL_SP1
DL_RG_f
DL_RG_r
DL_ADCLK
CDS_test
Address
STD1[7:0] (L)
STD2[15:8] (H)
1
1
1
1
0
1
1
1
D4
D3
D2
D7
D6
D5
D1
D0
D12 D11 D10 D9
D8
Dummy
clamp th
Dummy
clamp current
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HD49335HF | CDS/PGA AND 10-bit A/D TG Converter |
| HD49338F | CDS/PGA & 12-bit A/D Converter |
| HD49338HF | CDS/PGA & 12-bit A/D Converter |
| HD49351BP | CDS/PGA & 10-bit A/D TG Converter |
| HD49351HBP | CDS/PGA & 10-bit A/D TG Converter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HD49335HF | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:CDS/PGA AND 10-bit A/D TG Converter |
| HD49335HNP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:CDS/PGA & 10-bit A/D TG Converter |
| HD49335NP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:CDS/PGA & 10-bit A/D TG Converter |
| HD49338F | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:CDS/PGA & 12-bit A/D Converter |
| HD49338HF | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:CDS/PGA & 12-bit A/D Converter |
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