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參數(shù)資料
| 型號(hào)： | HN58C66 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 8192-word ×8-bit Electrically Erasable and Programmable CMOS ROM(8k字×8位 EEPROM) |
| 中文描述： | 8192字× 8位電可擦除和可編程的CMOS光盤（8K的字× 8位的EEPROM） |
| 文件頁(yè)數(shù)： | 15/19頁(yè) |
| 文件大?。?/td> | 172K |
| 代理商： | HN58C66 |
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HN58C66 Series
15
RDY/
Busy
Signal
RDY/
Busy
signal also allows the status of the EEPROM to be determined. The RDY/
B usy
signal has high
impedance except in write cycle and is lowered to V
OL
after the first write signal. At the end of a write cycle,
the RDY/
Busy
signal changes state to high impedance.
RES
Signal
When
RES
is low, the EEPROM cannot be read or programmed. Therefore, data can be protected by keeping
RES
low when V
CC
is switched.
RES
should be high during read and programming because it doesn’t provide
a latch function.
V
Program inhibit
CC
RES
Program inhibit
Read inhibit
Read inhibit
WE
,
CE
Pin Operation
During a write cycle, addresses are latched by the falling edge of
WE
or
CE
, and data is latched by the rising
edge of
WE
or
CE
.
Write/Erase Endurance and Data Retention
The endurance is 10
5
cycles in case of the page programming and 3
×
10
3
cycles in case of byte programming
(1% cumulative failure rate). The data retention time is more than 10 years when a device is page-
programmed less than 10
4
cycles.
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PDF描述 |
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| HN58S256AI | 32768-word ×8-bit Electrically Erasable and Programmable CMOS ROM(256k EEPROM (32k字 ×8位)) |
| HN58S256A | 256 k EEPROM (32-kword x 8-bit) |
| HN58S256AT-20 | 256 k EEPROM (32-kword x 8-bit) |
| HN58S256AT-15 | 256 k EEPROM (32-kword x 8-bit) |
| HN58S65AI | 8192-word ×8-bit Electrically Erasable and Programmable CMOS ROM(8k字×8位 EEPROM) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HN58C66FP-25 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EEPROM |
| HN58C66FP25T | 制造商:HIT 功能描述:HN58C66FP-25T |
| HN58C66FP-25T | 制造商:HIT 功能描述:HN58C66FP-25T |
| HN58C66P25 | 制造商:HITCHI 功能描述: |
| HN58C66P-25 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EEPROM |
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