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參數(shù)資料
| 型號(hào)： | HSP43168JC-33Z |
| 廠商： | Intersil |
| 文件頁數(shù)： | 4/25頁 |
| 文件大小： | 0K |
| 描述： | IC FIR FILTER DUAL 84-PLCC |
| 標(biāo)準(zhǔn)包裝： | 15 |
| 濾波器類型： | FIR |
| 濾波器數(shù)： | 2 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 84-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 84-PLCC（29.21x29.21） |
| 包裝： | 管件 |
12
FN2808.12
July 27, 2009
Example 2: Odd-Tap Even Symmetric
Filter Example
The HSP43168 may be configured as two independent
7-tap symmetric filters with a Functional Block Diagram
shown in Figure 8. Again, this example shows data flow
through one of the two FIR cells. As in the 8-tap filter
example, the HSP43168 implements the filtering operation
by summing data samples sharing a common coefficient
prior to multiplication by that coefficient. However, for odd
length filters the pre-addition requires that the center
coefficient be scaled by 1/2.
The operation of the FIR cell for odd length filters is better
understood by comparing the data/coefficient alignment in
Block Diagrams in Figure 10 are a simplification of the FIR
cell shown in Figure 1.
For odd length filters, proper data/coefficient alignment is
ensured by routing data entering the last register in the third
forward decimation stage to the Backward Shifting
Registers. In this configuration, the center coefficient must
be scaled by 1/2 to compensate for the summation of the
same data sample from both the Forward and Backward
Shifting Registers.
FIGURE 7B. DATA FLOW AS DATA SAMPLE 8 IS CLOCKED
INTO THE FEED-FORWARD STAGE
FIGURE 7C. DATA FLOW AS DATA SAMPLE 9 IS CLOCKED
INTO THE FEED-FORWARD STAGE
FIGURE 7. DATA FLOW DIAGRAMS FOR 8-TAP SYMMETRIC
FILTER
+
7
6
5
8
C0
C1
C2
C3
1
2
3
(X8 + X1)C0 + (X7 + X2)C1 + (X6+X3)C2 + (X5 + X4)C3
4
+
8
7
6
9
C0
C1
C2
C3
2
3
4
5
(X9 + X2)C0 + (X8 + X3)C1 + (X7 + X4)C2 + (X6 + X5)C3
HSP43168
INA0-9
INB0-9
OUT9-27
FIR A
FIR B
M
U
X
FIGURE 8. USING HSP43168 AS TWO INDEPENDENT FILTERS
7-TAP EVEN SYMMETRIC
AA
BB
FIGURE 10A. DATA FLOW AS DATA SAMPLE 6 IS CLOCKED
INTO THE FEED-FORWARD STAGE
FIGURE 10B. DATA FLOW AS DATA SAMPLE 7 IS CLOCKED
INTO THE FEED FORWARD STAGE
C0
C1
C2
C3
h(n)
C2
C1
C0
X9
X8
X7
X6
X5
X4
X3
X2
X1
X0
x(n)
FIGURE 9. DATA/COEFFICIENT ALIGNMENT FOR 7-TAP
SYMMETRIC FILTER
7-TAPS
5
4
3
6
C0
C1
C2
C3/2
0
1
2
3
+
(X6 + X0)C0 + (X5 + X1)C1 + (X4 + X2)C2 + (X3 + X3)C3/2
+
6
5
4
7
C0
C1
C2
C3/2
1
2
3
(X7 + X1)C0 + (X 6 + X2)C1 + (X5 + X3)C2 + (X4 + X4)C3/2
4
HSP43168
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HSP43168JC-40 | 制造商:Rochester Electronics LLC 功能描述:DUAL DIGITAL FILTER 84 PLCC, 40MHZ, COMM - Bulk |
| HSP43168JC-45 | 制造商:Rochester Electronics LLC 功能描述:DUAL DIGITAL FILTER 84 PLCC, 45MHZ, COMM - Bulk |
| HSP43168JC-45S5001 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HSP43168JI-40 | 制造商:Rochester Electronics LLC 功能描述:DUAL DIGITAL FILTER 84 PLCC 40MHZ,INDUSTRIAL TEMP - Bulk |
| HSP43168VC-33 | 制造商:Rochester Electronics LLC 功能描述:DUAL DIGITAL FILTER 100 PQFP, 33MHZ, COMM - Bulk 制造商:Harris Corporation 功能描述: 制造商:Intersil Corporation 功能描述: |
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