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參數(shù)資料
| 型號(hào)： | HYB 39S16160CT-6 |
| 廠商： | SIEMENS AG |
| 英文描述： | 1M × 16-Mbit Synchronous DRAM for High-Speed Graphics Applications(16M位(1M × 16)同步動(dòng)態(tài)RAM(用于高速圖形場(chǎng)合)) |
| 中文描述： | 100萬(wàn)× 16高兆同步DRAM高速圖形應(yīng)用程序（1,600位（1米× 16）同步動(dòng)態(tài)隨機(jī)存儲(chǔ)器（用于高速圖形場(chǎng)合）） |
| 文件頁(yè)數(shù)： | 11/19頁(yè) |
| 文件大?。?/td> | 110K |
| 代理商： | HYB 39S16160CT-6 |
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HYB 39S16160CT-5.5/-6/-7
16-MBit Synchronous DRAM
Data Book
11
09.99
cycle and close the active bank, or using the Burst Stop Command to terminate the existing burst
operation but leave the bank open for future Read or Write Commands to the same page of the
active bank. When interrupting a burst with another Read or Write Command, care must be taken
to avoid DQ contention. The Burst Stop Command, however, has the fewest restrictions making it
the easiest method to use when terminating a burst operation before it has been completed. If a
Burst Stop command is issued during a burst Write operation, then any residual data from the burst
Write cycle will be ignored. Data that is presented on the DQ pins before the Burst Stop Command
is registered will be written to the memory.
Power Up Procedure
All
V
DD
and
V
DDQ
must reach the specified voltage no later than any of input signal voltages. An
initial pause of 200
μ
s is required after power on. During this time, CKE must be stable high and no
Self Refresh command may be issued. All banks must be precharged and a minimum of eight Auto
Refresh cycles are required prior to the mode register set operation.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYB 39S16160CT-7 | 1M × 16-Mbit Synchronous DRAM for High-Speed Graphics Applications(16M位(1M × 16)同步動(dòng)態(tài)RAM(用于高速圖形場(chǎng)合)) |
| HYB 39S256160T | 256-Mbit(4banks × 4MBit × 16) Synchronous DRAM(256M(4列 × 4M位 × 16)同步動(dòng)態(tài)RAM) |
| HYB 39S256400T | 256-Mbit(4banks × 16MBit × 4) Synchronous DRAM(256M(4列 × 16M位 × 4)同步動(dòng)態(tài)RAM) |
| HYB 39S256800T | 256-Mbit(4banks × 8MBit × 8) Synchronous DRAM(256M(4列 × 8M位 × 8)同步動(dòng)態(tài)RAM) |
| HYB 39S256400AT | 256-Mbit(4banks × 16MBit × 4) Synchronous DRAM(256M(4列 × 16M位 × 4)同步動(dòng)態(tài)RAM) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYB39S16160CT-6 | 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:1M x 16 MBit Synchronous DRAM for High Speed Graphics Applications |
| HYB39S16160CT-7 | 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:1M x 16 MBit Synchronous DRAM for High Speed Graphics Applications |
| HYB39S16160CT-8 | 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:16 MBit Synchronous DRAM |
| HYB39S16320TQ-10 | 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:Special Mode Registers Two color registers Burst Read with Single Write Operation |
| HYB39S16320TQ-5.5 | 制造商:Siemens 功能描述:Electronic Component |
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