- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377397 > IDT72103L35J (INTEGRATED DEVICE TECHNOLOGY INC) CMOS PARALLEL-SERIAL FIFO 2048 x 9, 4096 x 9 PDF資料下載
參數(shù)資料
| 型號： | IDT72103L35J |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | CMOS PARALLEL-SERIAL FIFO 2048 x 9, 4096 x 9 |
| 中文描述： | 2K X 9 OTHER FIFO, 35 ns, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 22/31頁 |
| 文件大?。?/td> | 314K |
| 代理商： | IDT72103L35J |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁當(dāng)前第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁
5.37
22
IDT72103, IDT72104
CMOS PARALLEL-SERIAL FIFO 2048 x 9, 4096 x 9
COMMERCIAL TEMPERATURE RANGES
NOTE:
1.
SI
/PI and
SO
/PO pins are tied to VCC.
Figure 29. Block Diagram of 6,144 x 9/12,288 x 9-FIFO Memory, Depth Expansion in Parallel Mode
2753 drw 32
EF
IDT
72103/04
XO
FF
9
9
FL
Vcc
EF
IDT
72103/04
XO
FF
9
FL
XI
Q
R
EF
IDT
72103/04
XO
FF
9
FL
XI
XI
RS
EMPTY
W
9
D
FULL
DEPTH EXPANSION (DAISY CHAIN) MODE
The IDT72103/4 can be easily adapted to applications
where the requirements are for greater than 2048/4096 words.
Figure 29 demonstrates Depth Expansion using three
IDT72103/4s. Any memory depth can be attained by adding
additional IDT72103/4s. The IDT72103/4 operates in the
Depth Expansion configuration when the following conditions
are met:
1. The first device must be designated by grounding the
First Load (
FL
) control input pin.
2. All other devices must have the
FL
pin in the high state.
3. The Expansion Out (
XO
) pin of each device must be tied
to the Expansion In (
Xl
) pin of the next device. See
Figure 29.
4. External logic is needed to generate a composite
Full Flag (
FF
) and Empty Flag (
EF
). This requires the
OR-ing of all EFs and OR-ing of all FFs (i.e., all must be
set to generate the correct composite
FF
or
EF
). See
Figure 29.
5. The Retransmit (
RT
) function and Half-Full Flag (
HF
) are
not available in the Depth Expansion mode.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT72103L50J | CMOS PARALLEL-SERIAL FIFO 2048 x 9, 4096 x 9 |
| IDT72104L50J | CMOS PARALLEL-SERIAL FIFO 2048 x 9, 4096 x 9 |
| IDT72105 | CMOS PARALLEL-TO-SERIAL FIFO 256 x 16, 512 x 16, 1024 x 16 |
| IDT72105L25SO | Current-Mode PWM Controller 14-SOIC -40 to 85 |
| IDT72105L25TP | Current-Mode PWM Controller 8-SOIC -40 to 85 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT72103S50P | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT72104S120P | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT72104S50D | 制造商:Integrated Device Technology Inc 功能描述: 制造商:Integrated Device Technology Inc 功能描述:4K X 9 OTHER FIFO, 50 ns, CDIP40 |
| IDT72104S50P | 制造商:IDT/89'S 功能描述:FIFO, 4K x 9, Asynchronous, 40 Pin, Plastic, DIP |
| IDT72105L50S0 | 制造商:Integrated Device Technology Inc 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。