參數(shù)資料
型號: IDT77155L155
廠商: Integrated Device Technology, Inc.
英文描述: PHY (TC-PMD) USER NETWORK INTERFACE FOR 155 MBPS ATM NETWORK APPLICATIONS
中文描述: 物理層(增距鏡TC - PMD)的用戶網(wǎng)絡(luò)接口的155Mbps的ATM網(wǎng)絡(luò)中的應(yīng)用
文件頁數(shù): 18/50頁
文件大?。?/td> 307K
代理商: IDT77155L155
8.03
18
IDT77155
155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE
ADVANCED INFORMATION
Commercial Temperature Range
REGISTER LISTING
Address Register
0X00
Master Reset & ID Register
0X01
Configuration Register
0X02
Interrupt Register
0X04
Master Clock Monitor Register
0X05
Master Control Register
0X06
Transmit Clock Synthesis Control/Status Register
0X07
Receive Clock/Data Recovery Control/Stuts Register
0X10
Receive Section Overhead Control Register
0X11
Receive Section Overhead Status Register
0X12
Receive Section BIP Error Counter (LSB)
0X13
Receive Section BIP Error Counter (MSB)
0X14
Transmit Section Overhead Control Register
0X15
Transmit Section Overhead Control Register
0X18
Receive Line Overhead Status Register
0X19
Receive Line Overhead Interrupt Register
0X1A
Receive Line BIP Error Counter (LSB)
0X1B
Receive Line BIP Error Counter
0X1C
Receive Line BIP Error Counter (MSB)
0X1D
Receive Line FEBE Counter (LSB)
0X1E
Receive Line FEBE Counter
0X1F
Receive Line FEBE Counter (MSB)
0X20
Transmit Line Overhead Stutus Register
0X21
Transmit Line Overhead Control Register
0X24
Transmit K1 Byte Register
0X25
Transmit K2 Byte Register
0X26
Receive K1 Byte Register
0X27
Receive K2 Byte Register
0X30
Receive Path Overhead Status Register
0X31
Receive Path Overhead Interrupt Register
0X33
Receive Path Overhead Interrupt Enable Register
0X37
Receive Path Signal Lable Byte Register
0X38
Receive Path BIP Error Counter (LSB)
0X39
Receive Path BIP Error Counter (MSB)
0X3A
Receive Path FEBE Counter (LSB)
0X3B
Receive Path FEBE Counter (MSB)
0X3D
Receive Path BIP Error Control Register
Address Register
0X40
Transmit Path Overhead Control Register
0X41
Tramsmit Pointer Control Register
0X45
Transmit Pointer LSB Register
0X46
Transmit Pointer MSB Register
0X48
Transmit Path Signal Lable Byte Register
0X49
Transmit Path Overhead Control Register
0X50
Receive Cell Control Register
0X51
Receive Cell Interrupts & Interrupt Enable Register
0X52
Receive Cell Match Header Register
0X53
Receive Cell Match Header Mask Register
0X54
Receive Cell Correctable Error Counter
0X55
Receive Cell Uncorrectable Error Counter
0X56
Receive Cell Counter (LSB)
0X57
Receive Cell Counter
0X58
Receive Cell Counter (MSB)
0X59
Receive Cell Configuration Register
0X5A
Receive ID Address Register
0X60
Transmit Cell Control Register
0X61
Transmit Cell Idle/Unassigned Cell Header Pattern
0X62
Transmit Cell Idle/Unassigned Cell Header Pattern
0X63
Transmit Cell Configuration Register
0X64
Transmit Cell Counter (LSB)
0X65
Transmit Cell Counter
0X66
Transmit Cell Counter (MSB)
0X67
Transmit Cell Configuration Register
0X68
Transmit ID Address Register
0X70
Receive BER Status/Control Register
0X71
Receive BER Fail Threshold Register
0X72
Receive BER Fail Window Register
0X73
Receive BER Fail Denominator Register (LSB)
0X74
Receive BER Fail Denominator Register (MSB)
0X75
Receive BER Warning Threshold Register
0X76
Receive BER Warning Window Register
0X77
Receive BER Warning Denominator Register (LSB)
0X78
Receive BER Warning Denominator Register (MSB)
0X7F
Output PECL Control Register
相關(guān)PDF資料
PDF描述
IDT77155 PHY (TC-PMD) USER NETWORK INTERFACE FOR 155 MBPS ATM NETWORK APPLICATIONS
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