參數(shù)資料
型號(hào): IDT77155L155
廠(chǎng)商: Integrated Device Technology, Inc.
英文描述: PHY (TC-PMD) USER NETWORK INTERFACE FOR 155 MBPS ATM NETWORK APPLICATIONS
中文描述: 物理層(增距鏡TC - PMD)的用戶(hù)網(wǎng)絡(luò)接口的155Mbps的ATM網(wǎng)絡(luò)中的應(yīng)用
文件頁(yè)數(shù): 26/50頁(yè)
文件大?。?/td> 307K
代理商: IDT77155L155
8.03
26
IDT77155
155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE
ADVANCED INFORMATION
Commercial Temperature Range
TRANSMIT K2 BYTE REGISTER
DEFAULT = 8’B00000000
ADDRESS 0X25
Bit
Bit 7
Bit 6
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Symbol
K2Ins[7]
K2Ins[5]
K2Ins[4]
K2Ins[3]
K2Ins[2]
K2Ins[1]
K2Ins[0]
Function
K2 Insertion Bit 7
K2 Insertion Bit 5
K2 Insertion Bit 4
K2 Insertion Bit 3
K2 Insertion Bit 2
K2 Insertion Bit 1
K2 Insertion Bit 0
NOTE:
1. k2Ins[7:0] Value to be inserted into the K2 byte of transmit stream.
Continuously inserts this value into the transmit stream. However, the
least significant 4 bits of the K2 byte in the transmit stream is overridden
by the path RDI value and the line FERF value if error conditions are
detected in the receive section of the transmission convergence logic.
RECEIVE K1 BYTE REGISTER
DEFAULT = 8’BXXXXXXXX
ADDRESS 0X26
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R
R
R
R
R
R
R
R
Symbol
K1[7]
K1[6]
K1[5]
K1[4]
K1[3]
K1[2]
K1[1]
K1[0]
Function
Receive K1 Bit 7
Receive K1 Bit 6
Receive K1 Bit 5
Receive K1 Bit 4
Receive K1 Bit 3
Receive K1 Bit 2
Receive K1 Bit 1
Receive K1 Bit 0
NOTE:
1. k1[7:0] K1 byte of receive stream. Updated if new K1 byte received for 3
consecutive frames.
RECEIVE K2 BYTE REGISTER
DEFAULT = 8’BXXXXXXXX
ADDRESS 0X27
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R
R
R
R
R
R
R
R
Symbol
K2[7]
K2[6]
K2[5]
K2[4]
K2[3]
K2[2]
K2[1]
K2[0]
Function
Receive K2 Bit 7
Receive K2 Bit 6
Receive K2 Bit 5
Receive K2 Bit 4
Receive K2 Bit 3
Receive K2 Bit 2
Receive K2 Bit 1
Receive K2 Bit 0
NOTE:
1. k2[7:0] K2 byte of receive stream. Updated if new K2 byte received for 3
consecutive frames
TRANSMIT LINE OVERHEAD STATUS REGISTER
DEFAULT = 8’B00000000
ADDRESS 0X20
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R/W
Symbol
LRDI
Function
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Transmit line RDI
insertion into transmit
stream. When set to
logic one, line RDI is
inserted by transmitting
the code 110 into the 3
least significant bits of
the K2 byte of the
transmit stream.
TRANSMIT LINE OVERHEAD CONTROL REGISTER
DEFAULT = 8’B00000000
ADDRESS 0X21
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R/W
Symbol
B2Inv
Function
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
When set to logic one,
B2 byte is inverted
before insertion into
transmit stream.
TRANSMIT K1 BYTE REGISTER
DEFAULT = 8’B00000000
ADDRESS 0X24
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Symbol
K1Ins[7]
K1Ins[6]
K1Ins[5]
K1Ins[4]
K1Ins[3]
K1Ins[2]
K1Ins[1]
K1Ins[0]
Function
K1 Insertion Bit 7
K1 Insertion Bit 6
K1 Insertion Bit 5
K1 Insertion Bit 4
K1 Insertion Bit 3
K1 Insertion Bit 2
K1 Insertion Bit 1
K1 Insertion Bit 0
NOTE:
1. k1Ins[7:0] Value to be inserted into the K1 byte of transmit stream.
Continuously inserts this value into the transmit stream.
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