參數(shù)資料
型號(hào)： IDT82P2821BH
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 144/151頁
文件大小： 0K
描述： IC LIU T1/J1/E1 21+1CH 640-PBGA
標(biāo)準(zhǔn)包裝： 5
功能： 線路接口單元（LIU）
接口： E1，J1，T1
電路數(shù)： 1
電源電壓： 1.8V, 3.3V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 640-BGA 裸露焊盤
供應(yīng)商設(shè)備封裝： 640-PBGA-EP（31x31）
包裝： 托盤
包括： 缺陷和警報(bào)檢測(cè)，驅(qū)動(dòng)器過流檢測(cè)和保護(hù)，LLOS 檢測(cè)，PRBSARB / IB 檢測(cè)和生成
其它名稱： 82P2821BH
IDT82P2821
21(+1) CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
Programming Information
92
February 6, 2009
SCAL - Amplitude Scaling Control Register
AWG0 - Arbitrary Waveform Generation Control Register 0
Address: 007H, 047H, 087H, 0C7H, 107H, 147H, 187H, 1C7H, (CH1~CH8)
207H, 247H, 287H, 2C7H, 307H, 347H, 387H, 3C7H, (CH9~CH16)
407H, 447H, 487H, 4C7H, 507H, (CH17~CH21)
7C7H (CH0)
Type: Read / Write
Default Value: 36H
Bit
Name
Description
7 - 6
-
Reserved.
5 - 0
SCAL[5:0]
These bits specify a scaling factor to be applied to the amplitude of the waveform to be transmitted.
In T1/J1 mode, the standard value is ‘110110’ for the waveform amplitude. If necessary, increasing or decreasing by ‘1’ from the
standard value will result in 2% scaling up or down against the waveform amplitude. The scale range is from +20% to -100%.
In E1 mode, the standard value is ‘100001’ for the waveform amplitude. If necessary, increasing or decreasing by ‘1’ from the
standard value will result in 3% scaling up or down against the waveform amplitude. The scale range is from +100% to -100%.
Note:
The default value for SCAL[5:0] is ‘110110’ which is the T1/J1 standard value. Therefore, if E1 mode is used, ‘100001’
should be written to these bits to indicate the E1 standard value.
Address: 008H, 048H, 088H, 0C8H, 108H, 148H, 188H, 1C8H, (CH1~CH8)
208H, 248H, 288H, 2C8H, 308H, 348H, 388H, 3C8H, (CH9~CH16)
408H, 448H, 488H, 4C8H, 508H, (CH17~CH21)
7C8H (CH0)
Type: Read / Write
Default Value: 00H
Bit
Name
Description
7-
Reserved.
6
DONE
This bit is valid only when the user-programmable arbitrary waveform is enabled (i.e., the PULS[3:0] bits (b3~0, PULS,...) are set
to ‘1XXX’). This bit determines whether to enable the data writing/reading from RAM.
0: Disable. (default)
1: Enable.
5
RW
This bit is valid only when the user-programmable arbitrary waveform is enabled (i.e., the PULS[3:0] bits (b3~0, PULS,...) are set
to ‘1XXX’). This bit determines read/write direction.
0: Write data to RAM. (default)
1: Read data from RAM.
4 - 0
SAMP[4:0]
These bits are valid only when the user-programmable arbitrary waveform is enabled (i.e., the PULS[3:0] bits (b3~0, PULS,...)
are set to ‘1XXX’). These bits specify the RAM sample address.
00000: The RAM sample address is 0. (default)
00001: The RAM sample address is 1.
00010: The RAM sample address is 2.
......
10001: The RAM sample address is 17.
10010: The RAM sample address is 18.
10011 ~ 11111: The RAM sample address is 19.
76543
21
0
-
SCAL5
SCAL4
SCAL3
SCAL2
SCAL1
SCAL0
7654
321
0
-
DONE
RW
SAMP4
SAMP3
SAMP2
SAMP1
SAMP0
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參數(shù)描述
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