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參數(shù)資料
型號： IDT82P2916BFG
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 19/138頁
文件大?。?/td> 0K
描述： IC LIU T1/E1/J1 16CH SH 484BGA
標準包裝： 84
功能： 線路接口單元（LIU）
接口： E1，J1，T1
電路數(shù)： 16
電源電壓： 1.8V, 3.3V
功率（瓦特）： 3.10W
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 484-LFBGA
供應(yīng)商設(shè)備封裝： 484-CABGA（19x19）
包裝： 托盤
包括： AIS 警報檢測器和發(fā)生器，回送功能，PRBS 發(fā)生器 / 檢測器，遠程檢測器和發(fā)生器
IDT82P2916
16-CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
Physical And Electrical Specifications
115
April 24, 2010
8.3
DEVICE POWER CONSUMPTION AND DISSIPATION (TYPICAL) 1
Mode
Parameter
Total Consumption (W)
Total Device Power Dissipation
(for Thermal Consideration, W)
Per-Channel
Power Down Saving (mW) 2
1.8 V
3.3 V
Total
Fully
Internal
R120IN=1 3
Partially
Internal
R120IN=0 4
External 5
Fully
Internal
R120IN=1 3
Partially
Internal
R120IN=0 4
External 5
E1/120
PRBS
0.18
1.73
1.91
1.48
1.20
80
60
40
100% ones
0.18
2.31
2.49
1.87
1.46
130
90
70
E1/75
PRBS
0.18
1.86
2.04
1.77
0.98
90
60
50
100% ones
0.18
2.54
2.72
2.33
1.32
150
120
80
T1/100
QRSS
0.14
1.93
2.07
1.66
1.57
100
80
60
100% ones
0.14
2.79
2.93
2.32
2.24
160
120
90
J1/110
QRSS
0.14
1.87
2.01
1.59
1.56
100
70
60
100% ones
0.14
2.64
2.78
2.17
150
110
90
Note:
1. Test conditions: VDDx (typical) at 25 °C operating temperature (ambient).
2. The R_OFF bit (b5, RCF0,...) and T_OFF bit (b5, TCF0,...) are set to ‘1’ to enable per-channel power down.
3. The transmitter is in Internal Impedance Matching mode and the receiver is in Fully Internal Impedance Matching mode. That is, the R120IN bit (b4, RCF0,...) is set to ‘1’. And the
T_TERM[2:0] bits (b2~0, TCF0,...) and R_TERM[2:0] bits (b2~0, RCF0,...) are set according to different cable conditions.
4. The transmitter is in Internal Impedance Matching mode and the receiver is in Partially Internal Impedance Matching mode. That is, the R120IN bit (b4, RCF0,...) is set to ‘0’. And the
T_TERM[2:0] bits (b2~0, TCF0,...) and R_TERM[2:0] bits (b2~0, RCF0,...) are set according to different cable conditions.
5. For E1 mode, both the transmitter and the receiver are in External Impedance Matching mode. That is, the T_TERM[2:0] bits (b2~0, TCF0,...) are set to ‘111’ and the R_TERM[2:0]
bits (b2~0, RCF0,...) are set to ‘1xx’. For T1/J1 mode, as the transmitter External Impedance Matching mode is not supported, the transmitter is in Internal Impedance Matching mode
and the receiver is in Internal Impedance Matching mode. That is, the T_TERM[2:0] bits (b2~0, TCF0,...) are set according to different cable conditions and the R_TERM[2:0] bits (b2~0,
RCF0,...) are set to ‘1xx’.
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