參數(shù)資料
型號(hào): IDT82V2048EBBG
廠商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 27/76頁(yè)
文件大?。?/td> 0K
描述: IC LINE INTERFACE UNIT 208-PBGA
標(biāo)準(zhǔn)包裝: 10
類(lèi)型: 線路接口裝置(LIU)
規(guī)程: E1
電源電壓: 3.13 V ~ 3.47 V
安裝類(lèi)型: 表面貼裝
封裝/外殼: 208-BGA
供應(yīng)商設(shè)備封裝: 208-PBGA(17x17)
包裝: 托盤(pán)
產(chǎn)品目錄頁(yè)面: 1259 (CN2011-ZH PDF)
其它名稱(chēng): 800-1704
82V2048EBBG
33
INDUSTRIAL
TEMPERATURE RANGES
OCTAL CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE UNIT
3.11 MICROCONTROLLER INTERFACES
The microcontroller interface provides access to read and write the reg-
isters in the device. The chip supports serial processor interface and two
kinds of parallel processor interface: Motorola non_multiplexed mode and
Intel non_multiplexed mode. By pulling pin P/S to low or to High, the micro-
controller interface can be set to work in serial mode or in parallel mode
respectively. Refer to 7 MICROCONTROLLER INTERFACE TIMING
CHARACTERISTICS for details.
3.11.1 PARALLEL MICROCONTROLLER INTERFACE
The interface is compatible with Motorola or Intel microcontroller. Pin
INT/MOTisusedtoselecttheoperatingmodeoftheparallelmicrocontroller
interface. When pin INT/MOT is pulled to Low, the parallel microcontroller
interface is configured for Motorola compatible hosts. When High, it is for
Intel compatible microcontrollers.
3.11.2 SERIAL MICROCONTROLLER INTERFACE
The serial interfacepinsinclude SCLK, SDI,SDO, CS as well as SCLKE
(control pin for the selection of serial clock active edge). By pulling P/S pin
to LOW, the device operates in the serial host Mode. In this mode, the reg-
isters are programmed through a 24-bit word which contains an 8-bit
address byte (A0~A7), a subsequent 8-bit command byte (bit R/W) and an
8-bit data byte (D0~D7). When bit R/W is ‘1’, data is read out from pin SDO.
When bit R/W is ‘0’, data is written into SDI pin. Refer to Figure-21.
Figure-21 Serial Processor Interface Function Timing
A0
A1
A2
A3
A4
A5
A6
A7
R/W
D0
D1
D2
D3
D4
D5
D6
D7
CS
SCLK
SDI
address byte
command byte
input data byte (R/W=0)
D0
D1
D2
D3
D4
D5
D6
D7
remains high impedance
SDO
Output data byte (R/W=1)
D on' t
Ca r e
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